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STA339BWS 数据表(PDF) 57 Page - STMicroelectronics |
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STA339BWS 数据表(HTML) 57 Page - STMicroelectronics |
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57 / 79 page ![]() DocID015276 Rev 9 57/79 STA339BWS Register description 79 7.6.7 Limiter 1 extended release threshold (addr 0x33) The extended release threshold value is determined as follows: release threshold = -12 + ERTH1 / 4 7.6.8 Limiter 2 extended attack threshold (addr 0x34) The extended attack threshold value is determined as follows: attack threshold = -12 + EATH2 / 4 7.6.9 Limiter 2 extended release threshold (addr 0x35) The extended release threshold value is determined as follows: release threshold = -12 + ERTH2 / 4 Note: Attack/release threshold step is 0.125 dB in the range -12 dB and 0 dB. 7.7 User-defined coefficient control registers (addr 0x16 - 0x26) 7.7.1 Coefficient address register (addr 0x16) 7.7.2 Coefficient b1 data register bits (addr 0x17 - 0x19) D7 D6 D5 D4 D3 D2 D1 D0 ERTHEN1 ERTH1[6] ERTH1[5] ERTH1[4] ERTH1[3] ERTH1[2] ERTH1[1] ERTH1[0] 00 11 00 0 0 D7 D6 D5 D4 D3 D2 D1 D0 EATHEN2 EATH2[6] EATH2[5] EATH2[4] EATH2[3] EATH2[2] EATH2[1] EATH2[0] 00 11 00 0 0 D7 D6 D5 D4 D3 D2 D1 D0 ERTHEN2 ERTH2[6] ERTH2[5] ERTH2[4] ERTH2[3] ERTH2[2] ERTH2[1] ERTH2[0] 00 11 00 0 0 D7 D6 D5 D4 D3 D2 D1 D0 Reserved Reserved CFA5 CFA4 CFA3 CFA2 CFA1 CFA0 00 00 00 0 0 D7 D6 D5 D4 D3 D2 D1 D0 C1B23 C1B22 C1B21 C1B20 C1B19 C1B18 C1B17 C1B16 00 00 00 0 0 D7 D6 D5 D4 D3 D2 D1 D0 C1B15 C1B14 C1B13 C1B12 C1B11 C1B10 C1B9 C1B8 00 00 00 0 0 |
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