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STA339BWS 数据表(PDF) 78 Page - STMicroelectronics |
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STA339BWS 数据表(HTML) 78 Page - STMicroelectronics |
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78 / 79 page ![]() Revision history STA339BWS 78/79 DocID015276 Rev 9 11 Revision history Table 86. Document revision history Date Revision Changes 10-Dec-2008 1 Initial release. 16-Feb-2009 2 Updated names/descriptions for pins 17-20 in Chapter 2 on page 10 Added cross reference to I2S interface setup in Section 3.6: Power on/off sequence on page 18 Added Figure 4: Power-off sequence for pop-free turn-off on page 18 Updated text and Figure 22: Application diagram on page 71 Updated Section 7.2: PLL filter on page 71 01-Mar-2010 3 Updated presentation Removed master mute from Section 7.2.5 on page 46 Added Rth j-amb typical value to Table 4 on page 12 Updated Biquad # in Figure 8 on page 19 Updated section Fault detect recovery bypass on page 27 Updated SV naming in Table 42 on page 35 Updated CxBO description in Table 62 on page 50 Updated Biquad # for C12Hx in Table 72 on page 61 Updated text in sections Crossover and biquad #8, Prescale and Postscale on page 63. 17-Dec-2010 4 “Sound Terminal” now has registered trademark status Updated test circuit in Figure 3 on page 15 Removed text concerning hard mute in Section 7.2 on page 44 Updated coefficient register addresses towards end of Section 7.13.2 on page 68 Updated applications circuit in Figure 24 on page 74 22-Nov-2011 5 Updated bit D4 to “1” in Section 7.2.1: Mute/line output configuration register (addr 0x06) on page 45 20-Sep-2012 6 Added Section 4 on page 17 Modified Note:: The read write operation on RAM coefficients works only if RLCKI (pin29) is switching and stable (ref. Table 8, tLRJT timing) and PLL must be locked (ref bit D7 reg 0x2D). Updated Company information appearing on last page of document 24-Oct-2013 7 Modified ILIM and ISCP min. values in Table 7 on page 14 22-Sep-2014 8 Updated power section paragraph in Section 1: Description Added 1 channel mono-parallel (OCFG = 11) in Section 7.1.6: Configuration register F (addr 0x05) Updated Figure 22: Application circuit for 2 or 2.1-channel configuration and added Figure 23: Application circuit for mono BTL configuration 24-Jan-2019 9 Updated Table 1: Device summary on the cover page. |
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