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TUSB8043AI 数据表(PDF) 24 Page - Texas Instruments |
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TUSB8043AI 数据表(HTML) 24 Page - Texas Instruments |
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24 / 62 page  24 TUSB8043A SLLSF94 – JUNE 2019 www.ti.com Product Folder Links: TUSB8043A Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 8.4.4 SMBus Slave Operation When the SMBus interface mode is enabled, the TUSB8043A supports read block and write block protocols as a slave-only SMBus device. The TUSB8043A slave address is 1000 1xyz, where: • x is the state of GANGED/SMBA2/HS_UP pin at reset, • y is the state of FULLPWRMGMTz/SMBA1/SS_UP pin at reset, and • z is the read/write bit; 1 = read access, 0 = write access. For details on SMBus requirements, refer to the System Management Bus Specification. NOTE If the TUSB8043A is addressed by a host using an unsupported protocol it does not respond. The TUSB8043A waits indefinitely for configuration by the SMBus host and doesnot connect on the upstream port until the SMBus host indicates configuration is complete by clearing the CFG_ACTIVE bit. |
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