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TUSB8043AI 数据表(PDF) 44 Page - Texas Instruments |
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TUSB8043AI 数据表(HTML) 44 Page - Texas Instruments |
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44 / 62 page  Limiting DS Port VBUS current to 2.2A per port. PWRCTRL1_BATEN1 PWRCTRL2_BATEN2 ILIM1 DN1_VBUS DN2_VBUS BOARD_3P3V BOARD_5V BOARD_3P3V PWRCTRL2_BATEN2 DN2_VBUS DN1_VBUS PWRCTRL1_BATEN1 OVERCUR2Z OVERCUR1Z C42 0.1uF R19 10K 0402 5% + C44 150uF U2 TPS2561 GND 1 IN 2 IN 3 EN1 4 EN2 5 FAULT2Z 6 ILIM 7 OUT2 8 OUT1 9 FAULT1Z 10 PAD 11 C43 0.1uF R21 25.5K 0402 5% + C46 150uF C45 0.1uF R20 10K 0402 5% Limiting DS Port VBUS current to 2.2A per port. ILIM2 DN3_VBUS DN4_VBUS BOARD_3P3V BOARD_5V BOARD_3P3V PWRCTRL4_BATEN4 DN4_VBUS DN3_VBUS PWRCTRL3_BATEN3 OVERCUR4Z OVERCUR3Z + C49 150uF U3 TPS2561 GND 1 IN 2 IN 3 EN1 4 EN2 5 FAULT2Z 6 ILIM 7 OUT2 8 OUT1 9 FAULT1Z 10 PAD 11 C48 0.1uF R24 25.5K 0402 5% C50 0.1uF + C51 150uF R23 10K 0402 5% C47 0.1uF R22 10K 0402 5% 44 TUSB8043A SLLSF94 – JUNE 2019 www.ti.com Product Folder Links: TUSB8043A Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 9.2.1.2.6 VBUS Power Switch Implementation This particular example uses the Texas Instruments TPS2561 Dual Channel Precision Adjustable Current- Limited power switch. For details on this power switch or other power switches available from Texas Instruments, refer to the Texas Instruments website. Figure 33. VBUS Power Switch Implementation 9.2.1.2.7 Clock, Reset, and Misc The PWRCTL_POL is left unconnected which results in active high power enable (PWRCTL1, PWRCTL2, PWRCTL3, and PWRCTL4) for a USB VBUS power switch. SMBUSz pin is also left unconnected which selects I2C mode. Both PWRCTL_POL and SMBUSz pins have internal pull-ups. The 1 µF capacitor on the GRSTN pin can only be used if the VDD11 supply is stable before the VDD33 supply. The depending on the supply ramp of the two supplies the capacitor size may have to be adjusted. |
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