RA4M2 datasheet(33/93 Pages) RENESAS

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Table 2.13

Outline of operation for each unit

Peripheral

Outline of operation

GPT

Operating modes is set to saw-wave PWM mode.

GPT is operating with PCLKD.

POEG

Only clear module stop bit.

AGT

AGT is operating with PCLKB.

RTC

RTC is operating with LOCO.

WDT

WDT is operating with PCLKB.

IWDT

IWDT is operating with IWDTCLK.

USBFS

Transfer types is set to bulk transfer.

USBFS is operating using Full-speed transfer (12 Mbps).

SCI

SCI is transmitting data in clock synchronous mode.

IIC

Communication format is set to I2C-bus format.

IIC is transmitting data in master mode.

CAN

CAN is transmitting and receiving data in self-test mode 1.

SPI

SPI mode is set to SPI operation (4-wire method).

SPI master/slave mode is set to master mode.

SPI is transmitting 8-bit width data.

QSPI

QSPI is issuing Fast Read Quad I/O Instruction.

SSIE

Communication mode is set to Master.

System word length is set to 32 bits.

Data word length is set to 20 bits.

SSIE is transmitting data using I2S format.

SDHI

Transfer bus mode is set to 4-bit wide bus mode.

SDHI is issuing CMD24 (single-block write).

ADC12

Resolution is set to 12-bit accuracy.

Data registers is set to A/D-converted value addition mode.

ADC12 is converting the analog input in continuous scan mode.

DAC12

DAC12 is outputting the conversion result while updating the value of data register.

TSN

TSN is operating.

CTSU

CTSU is operating in self-capacitance single scan mode.

ELC

Only clear module stop bit.

SCE9

SCE9 is executing built-in self test.

CRC

CRC is generating CRC code using 32-bit CRC32-C polynomial.

DOC

DOC is operating in data addition mode.

CAC

Measurement target clocks is set to PCLKB.

Measurement reference clocks is set to PCLKB.

CAC is measuring the clock frequency accuracy.

DMAC

Bit length of transfer data is set to 32 bits.

Transfer mode is set to block transfer mode.

DMAC is transferring data from SRAM0 to SRAM0.

DTC

Bit length of transfer data is set to 32 bits.

Transfer mode is set to block transfer mode.

DTC is transferring data from SRAM0 to SRAM0.

2.2.7.2

Example of Tj calculation

Assumption :

● Package 100-pin LQFP : θja = 55.1 °C/W

● Ta = 100 °C

● ICCmax = 40 mA

RA4M2 Datasheet

2. Electrical Characteristics

R01DS0367EJ0140 Rev.1.40

May 9, 2025

Page 33 of 93

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