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RA4M2 数据表(PDF) 28 Page - Renesas Technology Corp |
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RA4M2 数据表(HTML) 28 Page - Renesas Technology Corp |
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28 / 93 page ![]() Table 2.8 Coremark and normal mode current Parameter Symbol Typ Unit Test conditions Supply Current*1 Coremark*2 *3 *4 ICC 81 µA/MHz ICLK = 100 MHz PCLKA = PCLKB = PCLKC = PCLKD = FCLK = 1.56 MHz Normal mode All peripheral clocks disabled, cache on, while (1) code executing from flash*2 *3 *4 60 All peripheral clocks disabled, cache off, while (1) code executing from flash*2 *3 *4 118 Note 1. Supply current values are with all output pins unloaded and all input pull-up MOSs in the off state. Note 2. Supply of the clock signal to peripherals is stopped in this state. This does not include the BGO operation. Note 3. PLL output frequency = 100MHz. Note 4. PLL2-LDO disabled. Under development Preliminary document Specifications in this document are tentative and subject to change RA4M2 Series 59. Electrical Characteristics xx xx, 2019 RA4M2 Target Spec Page 9 of 2123 Figure 47.2 Temperature dependency in Software Standby mode (reference data) Figure 47.3 Temperature dependency in Deep Software Standby mode, power supplied to standby SRAM and USB resume detecting unit (reference data) 1 10 100 1000 -40 -20 0 20406080 100 Ta (℃) Average value of the tested middle samples during product evaluation. Average value of the tested upper-limit samples during product evaluation. 0.1 1.0 10.0 100.0 -40 -20 0 20406080 100 Ta (℃) Average value of the tested middle samples during product evaluation. Average value of the tested upper-limit samples during product evaluation. Figure 2.2 Temperature dependency in Software Standby mode (reference data) RA4M2 Datasheet 2. Electrical Characteristics R01DS0367EJ0140 Rev.1.40 May 9, 2025 Page 28 of 93 |
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