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db09284e_V3.01_preliminary_2017-07-06

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AS89020

V3.01

Figure 16 shows the SPI interconnection of two AS89020 in principle.

Figure 16: Symbolic Interconnection of two AS89020

10 NOTES FOR PCB LAYOUT

The connections to the inputs IN0…IN3 of the AS89020 have to be protected against any

kind of electromagnetic coupling and have to be guarded with VRT potential to avoid lea-

kage currents. Without guarding layers at the inputs the isolation resistance of the PCB

gives leakage currents with equivalent values like the sensor currents

The analog supply for AS89020 must be placed as close as possible to the converter. The connection

between the analog and digital ground should be beneath (LP level) and/or near the AS89020

(Pins 18 & 20).

Digital signals and circuit lines with high current loads must not be used directly beneath and next to the

photodiode sensor as well as the AS89020.

The AS89020 converter operates internally with minimal currents (pAmps). Therefore, protection measures

need to be performed to shield the IC against EMC stress or external interferences.

The connections between the photodiode sensor (anode and cathode) and the AS89020 should be as short

as possible (< 10 mm) and without interlayer connections.

Photodiode sensor, AS89020 and its REXT should be placed on the same PCB side. The signal VRT (common

cathode or common anode) should have the same cross-section as the four sensor connectors.

Around signal lines a conductor connected with VRT should be created. One level below the signals a VRT

potential area should be created that extends only to the analog inputs and the signal lines.