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db09284e_V3.01_preliminary_2017-07-06

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AS89020

V3.01

Figure 7: SPI Transfer Mode

The data transfer starts at first with the MSB (bit 7) and ends with LSB (bit 0). During the transfer of at

least 8 bit the signal CSN must be at low level. The signal CSN is allowed to be set back to the high level

between full bytes, if more than one byte of data will be transferred.

In the configuration state (OSR:DOS = ,010b’) the data transfer must always be performed with exactly 3

data bytes. The SPI transfer fails in case of a violation and any further communication also fails. The write

address (WA) has to be 6.5 sent as the first byte, the second byte contains the data which is to be written

(WD) and the third byte is the read address (RA) which is to be read in the next transmission cycle. The

first data byte at SDO always contains the data (RD) of the address which has been selected by the read

address (RA) of the previous transmission cycle (see Figure 8).

Figure 8: Configuration State – Example of the SPI Data Transfer Cycle

Writing OSR:DOS = ,011b’ causes the change to measurement state.

In the measurement state the read address is not required, so per transfer cycle only 2 data bytes must

be transferred via SDI. The first byte contains the write address and the second byte the write data. Usually

the OSR register should be written. The write address (WA) is ,00h’ and the write data (WD) for no operation

or no change is ,00h’. If a new tracking will be started, the write data (WA must be set to ,80h’. The

returned data (on SDO) in the measurement state are the output data (OD) of the AD conversion. Figure

9 shows an example of three transfer cycles within the measurement state. However, it is recommended

to pause at least one clock cycle between each transfer of two bytes for a better accuracy of the AD

conversion. The read out order of the conversion result registers will be defined by the Register CH_ORDER

(see chapter 0).

1

2

3

data alteration

data acquisition

SCLK

SDI/SDO

WA-1

WD-1

RA-1

RD-0(RA-0)

WA-2

WD-2

RA-2

RD-1(RA-1)

SDI

SDO

SCLK

CSN