ams.com

db09284e_V3.01_preliminary_2017-07-06

Page 17 of 30

AS89020

V3.01

Figure 9: Measurement State – Example of the SPI Data Transfer Cycle

A return from measurement state to configuration state via programming OSR (OSR:DOS = ,010b’) always

resets all control registers to their default value except the register OSR itself.

6 DESCRIPTION OF REGISTERS

6.1 Control Register Bank

Table 6 shows an overview of the internal registers which can be accessed via SPI-interface. The

Operational State Register OSR is the only register, which can be written in both states - configuration and

measurement state, but it cannot be read. Reading of an inexistent or only writable register always returns

the value ,00h’. Table 7 shows the addressable register space of the AS89020.

Table 6: Register Access Overview

ADDRESS

[HEX]

ACCESS IN CONFIGURATION

STATE

ACCESS IN MEASUREMENT STATE

WRITE

READ

WRITE

READ

00

OSR

–

OSR

01

–

–

02

–

AGEN

–

03

–

–

04

–

–

05

–

–

06

CREG

–

07

SW_R0

–

08

SW_R1

–

09

SW_R2

–

0A

SW_R3

–

0B

CH_PD

–

0C

CH_ORDER

–

0D

–

–

0E

–

–

0F

–

–

WD-1

OD-1

WD-2

OD-2

WD-3

OD-3

WA-2

WA-3

WA-1

SDI

SDO

SCLK

CSN