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RZ/T2ME 数据表(PDF) 77 Page - Renesas Technology Corp |
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RZ/T2ME 数据表(HTML) 77 Page - Renesas Technology Corp |
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77 / 116 page  Note 1. tPLcyc: PCLKL cycle PCLKL tCMTWICW Input capture input Figure 2.39 CMTW input capture input timing 2.5.5.3 MTU3 Timing Table 2.27 MTU3 timing Parameter Symbol Min. Max. Unit*1 Reference figure MTU3 Input capture input pulse width Single-edge setting tMTICW 2.5 — tPHcyc Figure 2.40 Both-edge setting 3.5 — Timer clock pulse width Single-edge setting tMTCKWH, tMTCKWL 2.5 — tPHcyc Figure 2.41 Both-edge setting 3.5 — Phase counting mode 3.5 — Note 1. tPHcyc: PCLKH cycle PCLKH tMTICW Input capture input Figure 2.40 MTU3 input capture input timing PCLKH tMTCKWH MTCLKA to MTCLKD tMTCKWL Figure 2.41 MTU3 clock input timing RZ/T2ME Datasheet 2. Electrical Characteristics R01DS0441EJ0110 Rev.1.10 Mar 13, 2026 Page 77 of 116 |
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