ST7263B datasheet(67/132 Pages) STMICROELECTRONICS

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ST7263B

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11.4 USB INTERFACE (USB)

11.4.1 Introduction

The USB Interface implements a low-speed func-

tion interface between the USB and the ST7 mi-

crocontroller. It is a highly integrated circuit which

includes the transceiver, 3.3 voltage regulator, SIE

and DMA. No external components are needed

apart from the external pull-up on USBDM for low

speed recognition by the USB host. The use of

DMA architecture allows the endpoint definition to

be completely flexible. Endpoints can be config-

ured by software as in or out.

11.4.2 Main Features

USB Specification Version 1.1 Compliant

Supports Low-Speed USB Protocol

Two or Three Endpoints (including default one)

depending on the device (see device feature list

and register map)

CRC

generation/checking,

NRZI

encoding/

decoding and bit-stuffing

USB Suspend/Resume operations

DMA Data transfers

On-Chip 3.3V Regulator

On-Chip USB Transceiver

11.4.3 Functional Description

The block diagram in Figure 37, gives an overview

of the USB interface hardware.

For general information on the USB, refer to the

“Universal Serial Bus Specifications” document

available at http//:www.usb.org.

Serial Interface Engine

The SIE (Serial Interface Engine) interfaces with

the USB, via the transceiver.

The SIE processes tokens, handles data transmis-

sion/reception, and handshaking as required by

the USB standard. It also performs frame format-

ting, including CRC generation and checking.

Endpoints

The Endpoint registers indicate if the microcontrol-

ler is ready to transmit/receive, and how many

bytes need to be transmitted.

DMA

When a token for a valid Endpoint is recognized by

the USB interface, the related data transfer takes

place, using DMA. At the end of the transaction, an

interrupt is generated.

Interrupts

By reading the Interrupt Status register, applica-

tion software can know which USB event has oc-

curred.

Figure 37. USB Block Diagram

CPU

MEMORY

Transceiver

3.3V

Voltage

Regulator

SIE

ENDPOINT

DMA

INTERRUPT

Address,

and interrupts

USBDM

USBDP

USBVCC

6 MHz

REGISTERS

data buses

USBGND

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