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ST7263B 数据表(PDF) 88 Page - STMicroelectronics |
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ST7263B 数据表(HTML) 88 Page - STMicroelectronics |
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88 / 132 page ![]() ST7263B 88/132 8-BIT A/D CONVERTER (ADC) (Cont’d) 11.6.6 Register Description CONTROL/STATUS REGISTER (CSR) Read /Write Reset Value: 0000 0000 (00h) Bit 7 = COCO Conversion Complete This bit is set by hardware. It is cleared by soft- ware reading the result in the DR register or writing to the CSR register. 0: Conversion is not complete 1: Conversion can be read from the DR register Bit 6 = Reserved. must always be cleared. Bit 5 = ADON A/D Converter On This bit is set and cleared by software. 0: A/D converter is switched off 1: A/D converter is switched on Bit 4 = Reserved. must always be cleared. Bits 3:0 = CH[3:0] Channel Selection These bits are set and cleared by software. They select the analog input to convert. *Note: The number of pins AND the channel selec- tion varies according to the device. Refer to the de- vice pinout. DATA REGISTER (DR) Read Only Reset Value: 0000 0000 (00h) Bits 7:0 = D[7:0] Analog Converted Value This register contains the converted analog value in the range 00h to FFh. Note: Reading this register reset the COCO flag. 70 COCO 0 ADON 0 CH3 CH2 CH1 CH0 Channel Pin* CH3 CH2 CH1 CH0 AIN0 0 0 0 0 AIN1 0 0 0 1 AIN2 0 0 1 0 AIN3 0 0 1 1 AIN4 0 1 0 0 AIN5 0 1 0 1 AIN6 0 1 1 0 AIN7 0 1 1 1 AIN8 1 0 0 0 AIN9 1 0 0 1 AIN10 1 0 1 0 AIN11 1 0 1 1 AIN12 1 1 0 0 AIN13 1 1 0 1 AIN14 1 1 1 0 AIN15 1 1 1 1 70 D7 D6 D5 D4 D3 D2 D1 D0 |
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