STA002 datasheet(16/43 Pages) STMICROELECTRONICS

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The 22 bits value to be written into this register is

given by:

SYMFREQ

= INT 



Fsym

Fck







for example if

M_CLK = 39,02687179MHz, Fck = M_CLK/4

SYMFREQ = 790995 = (C11D3)HEX

which is the Reset Value.

3.3.2 Loop equations

This timing loop is a second order one. The natu-

ral frequency and the damping factor may be cal-

culated by the following formulas:

= √

Ko KD

β ⋅ m

where

β is programmed by the timing register

beta_tmg:

b = 2

beta_tmg-14 ⋅ Fsym (Fsym = 1.84MHz)

where m is the reference value of the AGC2 loop

(see AGC2_REF register), KD is the timing detec-

tor gain and Ko is the constant of the timing NCO:

22 Fck

The damping factor is:

ξ =

2 √



Ko KD

⋅ m

where

α is programmed by the timing register al-

pha_tmg:

α = 2alpha_tmg

beta_tmg can only take value from 0 to 15; if

beta_tmg is 0 the loop reduces to a first order

one.

Alpha_tmg can take any value from 0 to 7. If both

alpha_tmg and beta_tmg are 0 then the timing

loop is open.

The timing phase detector gain KD depends on

the signal to noise ratio and is given in the follow-

ing figure:

(see par. 3.8 for the C/N definition)

KD = 0.356 for a noise free input signal.

The natural frequency and the damping factor

can be rewritten as:

= 2.064 √

FCK √



⋅ KD ⋅ 2beta_tmg

ξ = 0.0577 √

FCK

√

⋅ KD

beta_tmg ⋅ 2

alpha_tmg

Table 1 gives the natural frequency and the

damping factor for the nominal amplitudem =22,

KD = 0.356 and M_CLK = 39.02687179MHz.

In high noise conditions the value of KD may be

reduced up to 25% of its nominal (noise free)

value; it is recommended to start with a damping

factor, calculated without noise, greater than the

usual value of 0.7.

3.4. CARRIER RECOVERY

Also the carrier recovery is completely imple-

mented digitally and comprises a phase and fre-

quency detector, a loop filter, a NCO and a

sine/cosine look-up table.

The carrier NCO is the local oscillator for the in-

put quadrature demodulator.

3.4.1 Carrier loop registers

Carrier

loop

filter

parameter

(CARFLTPAR)

Internal address: 8F H

Reset Value: 57H

MSB

LSB

alpha_car

beta_car

C/N(dB)

0.1

0.2

0.3

(Kd)

D97AU724

Phase Detector Gain

STA002

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