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STA002 数据表(PDF) 30 Page - STMicroelectronics

部件名 STA002
功能描述  STARMANO CHANNEL DECODER
PDF  43 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA002 数据表(HTML) 30 Page - STMicroelectronics

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BC input delay (bytes)
b2b1 =
00
01
10
11
1
2
3
4
b3: Test purpose (must be set at 0 in functional
mode)
b7 to b4: test purpose
Reg name: BC_ALARM_REG
Internal address: 01CH
Type: R/W
Default:20H
MSB
LSB
X
X
b5
b4
b3
b2
b1
b0
Description: BC finite state machine control regis-
ter (see table 6)
b5 indicates the BC synchronization mode
1: SP preamble detection
0: Synch from PRC
Reg name: IW_REG
Internal address: 017, 016, 015, 014,
013, 012, 011, 010,
Type: W
IW_REG (63:56) (addr 017)
MSB
LSB
b63
b62
b61
b60
b59
b58
b57
b56
IW_REG (55:48) (addr 016)
MSB
LSB
b55
b54
b53
b52
b51
b50
b49
b48
IW_REG (47:40) (addr 015)
MSB
LSB
b47
b46
b45
b44
b43
b42
b41
b40
IW_REG (39:32) (addr 014)
MSB
LSB
b39
b38
b37
b36
b35
b34
b33
b32
IW_REG (31:24) (addr 013)
MSB
LSB
b31
b30
b29
b28
b27
b26
b25
b24
IW_REG (23:16) (addr 012)
MSB
LSB
b23
b22
b21
b20
b19
b18
b17
b16
IW_REG (15:8) (addr 011H)
MSB
LSB
b15
b14
b13
b12
b11
b10
b9
b8
IW_REG (7:0) (addr 010H)
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
Description:
b63 to b0 contain the initialization word IW.
Table 6: BC_ALARM_REG
b4
b3
b2
b1
b0
BC FSM active states
0
0
0
0
0
sp_detection, sp_presync, sp_sync
1
0
0
0
0
sp_detection, sp_presync, sp_sync, alarm_state (1 cycle)
1
0
0
0
1
sp_detection, sp_presync, sp_sync, alarm_state (2 cycles)
1
0
0
1
0
sp_detection, sp_presync, sp_sync, alarm_state (3 cycles)
1
0
0
1
1
sp_detection, sp_presync, sp_sync, alarm_state (4 cycles)
1
-
-
-
-
sp_detection, sp_presync, sp_sync, alarm_state (n cycles)
1
1
1
1
0
sp_detection, sp_presync, sp_sync, alarm_state (15 cycles)
1
1
1
1
1
sp_detection, sp_presync, sp_sync, alarm_state (16 cycles)
STA002
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