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数据搜索系统，热门电子元器件搜索 |
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STA002 数据表(PDF) 29 Page - STMicroelectronics |
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STA002 数据表(HTML) 29 Page - STMicroelectronics |
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29 / 43 page  Reg name: PIW_ RAM Internal address: 03F,03E, 03D, 03C, 03B, 03A, 039, 038, Type: W PIW_RAM (63:56) (addr 03F) MSB LSB b63 b62 b61 b60 b59 b58 b57 b56 PIW_RAM (55:48) (addr 03E) MSB LSB b55 b54 b53 b52 b51 b50 b49 b48 PIW_RAM (47:40) (addr 03D) MSB LSB b47 b46 b45 b44 b43 b42 b41 b40 PIW_RAM (39:32) (addr 03C) MSB LSB b39 b38 b37 b36 b35 b34 b33 b32 PIW_RAM (31:24) (addr 03B) MSB LSB b31 b30 b29 b28 b27 b26 b25 b24 PIW_RAM (23:16) (addr 03A) MSB LSB b23 b22 b21 b20 b19 b18 b17 b16 PIW_RAM (15:8) (addr 039) MSB LSB b15 b14 b13 b12 b11 b10 b9 b8 PIW_RAM (7:0) (addr 038) MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 Description: b63 tob0 contain the prestored initialization word 0 which is the only one downloadable by the processor. Reg name: EM_REG Internal address: 018H Type: R/W MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 Description : Encryption mode register b7 to b1 = not used RFU b0 indicate the encryption mode (1) 1: normal encryption mode 0: enable blocking (1) for more information refer to document number WST-WSG-DDS-003-500000 Chipset Encryption Implementation Specification for World space receiver Reg name: PIWE_REG Internal address: 01AH, 019H Type: R/W PIWE (15:8) (addr 01AH) MSB LSB b15 b14 b13 b12 b11 b10 b9 b8 PIWE (7:0) (addr 019H) MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 Description : b15 to b0 contain the 16 BIT static key selector word. Each bit PIWE enables a certain static key. If bit A0 of PIWE is set, the static key 0 will be en- abled for read out and so forth. Reg name: BCIN_DELAY_REG Internal address: 01BH Type: R/W Default 00H MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 Description : BC input delay and BC input enable register b0: enables external BC input STA002 29/43 |
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