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ADE7569 数据表(PDF) 71 Page - Analog Devices |
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ADE7569 数据表(HTML) 71 Page - Analog Devices |
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71 / 136 page  Preliminary Technical Data ADE7566/ADE7569 Rev. PrA | Page 71 of 136 Table 54. Program Control SFR (PCON, 0x87) Bit No. Default Description 7 0 SMOD bit. Double baud rate control. 6 to 0 0 Reserved. Should be left cleared. Table 55. Data Pointer Low SFR (DPL, 0x82) Bits Default Description 7 to 0 0 Contain the low byte of the data pointer. Table 56. Data Pointer High SFR (DPH, 0x83) Bits Default Description 7 to 0 0 Contain the high byte of the data pointer. Table 57. Data Pointer Register (DPTR, 0x82 and 0x83) Bits Default Description 15 to 0 0 Contain two byte address of the data pointer. DPTR is the combination of DPH and DPL SFRs. Table 58. Stack Pointer SFR (SP, 0x81) Bits Default Description 7 to 0 7 Contain the 8 LSBs of the pointer for the stack. Table 59. Configuration SFR (CFG, 0xAF) Bit No. Mnemonic Description 7 Reserved This bit should be left set for proper operation. Enhanced UART Enable Bit. EXTEN Result 0 Standard 8052 UART without enhanced error-checking features. 6 EXTEN 1 Enhanced UART with enhanced error checking (see the UART Additional Features section). Synchronous Communication Selection Bit. SCPS Result 0 I2C port is selected for control of the shared I2C/SPI pins and SFRs. 5 SCPS 1 SPI port is selected for control of the shared I2C/SPI pins and SFRs. 38 kHz Modulation Enable Bit. MOD38EN Result 0 38 kHz modulation is disabled. 4 MOD38EN 1 38 kHz modulation is enabled on the pins selected by the MOD38[7:0] bits in the Extended Port Configuration SFR (EPCFG, 0x9F). 3 to 2 Reserved XRENx Result XREN1 OR XREN0 = 1 Enables MOVX instruction to use 256 bytes of extended RAM. 1 to 0 XREN1, XREN0 XREN1 AND XREN0 = 0 Disables MOVX instruction. |
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