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ADE7569 数据表(PDF) 23 Page - Analog Devices |
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ADE7569 数据表(HTML) 23 Page - Analog Devices |
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23 / 136 page ![]() Preliminary Technical Data ADE7566/ADE7569 Rev. PrA | Page 23 of 136 POWER MANAGEMENT The ADE7566/ADE7569 have an elaborate power management circuitry that manages the regular power supply to battery switchover and power supply failures. The power management functionalities can be accessed directly through the 8052 SFRs (see Table 13). Table 13. Power Management SFRs SFR Address R/W Mnemonic Description 0xEC R/W IPSME Power Management Interrupt Enable. See Table 18. 0xF5 R/W BATPR Battery Switchover Configuration. See Table 16. 0xF8 R/W IPSMF Power Management Interrupt Flag. See Table 15. 0xFF R/W INTPR Interrupt Wake-Up Configuration. See Table 14. 0xF4 R/W PERIPH Peripheral Configuration SFR. See Table 17. 0xC5 R/W POWCON Power Control. See Table 23. 0xFB R/W SCRATCH1 Scratch Pad 1. See Table 19. 0xFC R/W SCRATCH2 Scratch Pad 2. See Table 20. 0xFD R/W SCRATCH3 Scratch Pad 3. See Table 21. 0xFE R/W SCRATCH4 Scratch Pad 4. See Table 22. POWER MANAGEMENT REGISTER DETAILS Table 14. Interrupt Pins Configuration SFR (INTPR, 0xFF) Bit No. Mnemonic Default Description 7 RTCCAL 0 Controls RTC calibration output. When set, the RTC calibration frequency selected by FSEL[1:0] is output on the P0.2/CF1/RTCCAL pin. Sets RTC calibration output frequency and calibration window. FSEL[1:0] Result (Calibration window, frequency) 00 30.5 sec, 1 Hz 01 30.5 sec, 512 Hz 10 0.244 sec, 500 Hz 6 to 5 FSEL[1:0] 00 11 0.244 sec, 16.384 kHz 4 Reserved Controls the function of INT1. INT1PRG[2:0] Result X00 GPIO enabled X01 BCTRL enabled 01X INT1 input disabled 3 to 1 INT1PRG[2:0] 000 11X INT1 input enabled Controls the function of INT0. INT0PRG Result 0 INT0 input disabled 0 INT0PRG 0 1 INT0 input enabled Writing to the Interrupt Pins Configuration SFR (INTPR, 0xFF) To protect the RTC from runaway code, a key must be written to the Key SFR (KYREG, 0xC1) to obtain write access to the Interrupt Pins Configuration SFR (INTPR, 0xFF). KYREG should be set to 0xEA to unlock this SFR and reset to zero after a timekeeping register is written to. The RTC registers can be written using the following 8052 assembly code: MOV KYREG, #0EAh MOV INTPR, #080h |
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