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STULPI01A 数据表(PDF) 14 Page - STMicroelectronics

部件名 STULPI01A
功能描述  High speed USB On-The-Go ULPI transceiver
PDF  44 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STULPI01A 数据表(HTML) 14 Page - STMicroelectronics

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Electrical characteristics
STULPI01A - STULPI01B
14/44
Table 7.
Switching characteristics
(Over recommended operating conditions unless otherwise noted. All the typical values are
referred to TA = 25 °C, V1V8VIO = 1.8 V, VBAT = 3.6 V, CT = 4.7 µF)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Reset
tRESETEXT
Width of reset pulse on RESETn pin
10
µs
UART mode
tRISE
Switching time (max low to min high) CLOAD=185pF
215
ns
tFALL
Switching time (min high to max low) CLOAD=185pF
215
ns
tPD_RX
Delay time (50% DM to 50% D1)
CL=10pF
60
ns
tPD_TX
Delay time (50% D0 to 50% DP)
60
ns
tUARTON2V7 Turn-on time for TXD line (2V7)
UART_2V7 = 1 measured
from DIR assertion
22.5
ms
tUARTOFF2V7 Turn-off time for TXD line (2V7)
UART_2V7 = 1 measured
from STP assertion
1µs
tUARTON
Turn-on time for TXD line
UART_2V7 = 0 measured
from DIR assertion
60
ns
tUARTOFF
Turn-off time for TXD line
UART_2V7 = 0 measured
from DIR de-assertion
60
ns
Low-speed driver
tLR
Data signal rise time
CLOAD = 600pF
75
100
300
ns
tLF
Data signal fall time
CLOAD = 600pF
75
100
300
ns
RFMLS
Rise and fall time matching
-20
20
%
DRLS
Low-speed data rate
1.49925
1.50075 Mb/s
tDDJ1
Data jitter to next transition
Includes freq. tolerances
-25
25
ns
tDDJ2
Data jitter for paired transitions
Includes freq. tolerances
-14
14
ns
tLEOPT
SE0 interval of EOP
1250
1500
ns
Full-speed driver
tFR
Data signal rise time
CLOAD = 50pF
4
20
ns
tFF
Data signal fall time
CLOAD = 50pF
4
20
ns
RFMFS
Rise and fall time matching
-10
+10
%
DRHS
Full-speed data rate
11.994
12.006
Mb/s
tDJ1
Data jitter to next transition
Includes freq. tolerances
-3.5
3.5
ns
tDJ2
Data jitter for paired transitions
Includes freq. tolerances
-4
4
ns
tFEOPT
SE0 interval of EOP
160
175
ns
Clock generation constants
tPLL
PLL lock time
(1)
200
µs
tDLL
DLL lock time
(1)
280
µs



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