STULPI01A datasheet(33/44 Pages) STMICROELECTRONICS

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STULPI01A - STULPI01B

ULPI registers

33/44

Table 18.

Interface control register

07h-09h(Read), 07h(Write), 08h(Set), 09h(Clear)

(Enables alternative interface and STULPI01 features.)

Field name

Bits

Access

Reset

Description

6-pin

FsLsSerialMode

rd/wr/s/c

Changes the ULPI interface to 6-pin serial mode. The

STULPI01 automatically clears this bit when serial mode is

exited.

0b: FS/LS packets are sent using parallel interface.

1b: FS/LS packets are sent 6-pin using serial interface.

3-pin

FsLsSerialMode

rd/wr/s/c

Changes the ULPI interface to 3-pin serial mode. STULPI01

automatically clears this bit when serial mode is exited.

0b: FS/LS packets are sent using parallel interface.

1b: FS/LS packets are sent using 4-pin serial interface.

Carkit mode

rd/wr/s/c

STULPI01 does not support all the features of car kit mode.

Only the UART functionality is implemented.

0b: Disables serial car kit mode.

1b: Enables serial car kit mode.

ClockSuspendM

rd/wr/s/c

Active low clock suspend. Valid only in serial mode and car

kit mode. Powers down the internal clock circuitry. Valid only

when SuspendM = 1b. STULPI01 ignores ClockSuspend

when SuspendM = 0b. By default, the clock will not be

powered in Serial and car kit modes.

0b: Clock will not be powered in serial and car kit modes.

1b: Clock will be powered in Serial and car kit modes.

Reserved

rd/wr/s/c

STULPI01 do not implement autoresume feature, because

the clock can be restarted in less than 1ms.

Indicator

complement

rd/wr/s/c

Tells to invert the ExternalVbusIndicator signal, generating

the complement output.

0b: STULPI01 will not invert ExternalVbusIndicator signal

1b: STULPI01 will invert ExternalVbusIndicator signal.

Indicator

PassThru

rd/wr/s/c

Controls whether the complement output is qualified with the

Internal VbusValid comparator before being used in the

Vbus State in the RX CMD.

0b: complement output signal is qualified with the Internal

VbusValid comparator.

1b: complement output signal is not qualified with the

Internal VbusValid comparator.

Interface protect

disable

rd/wr/s/c

Controls circuitry for protecting the ULPI interface when the

link 3-states STP and DATA. This bit is not intended to affect

the operation of the holding state. Refer to section 3.12 of

ULPI specification 1.1 for more details.

0b: Enables the interface protect circuit (default).

1b: Disables the interface protect circuit.

Interface protection circuit consists of pull-down resistors on

DATA and pull-up resistor on STP.

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