STPCINDUSTRIAL datasheet(18/55 Pages) STMICROELECTRONICS

18 / 55 page

PIN DESCRIPTION

18/55

Issue 1.1

Table 3-2. Definition of Signal Pins

Signal Name

Dir

Description

Qty

BASIC CLOCKS AND RESETS

SYSRSTI#*

System Reset / Power good

SYSRSTO#*

Reset Output to System

XTALI

14.3MHz Crystal Input

XTALO

14.3MHz Crystal Output

PCI_CLKI*

33MHz PCI/CardBus Input Clock

PCI_CLKO

33MHz PCI/CardBus Output Clock

ISA_CLK, ISA_CLK2X

ISA Clock x1 and x2 (also Multiplexer Select Line For IPC)

CLK14M

ISA bus synchronisation clock

HCLK*

I/O

33 / 66MHz Host Clock (Test)

DEV_CLK*

24MHz Peripheral Clock

GCLK2X

I/O

80MHz Graphics Clock

DCLK

I/O

135MHz Dot Clock

VDD_xxx_PLL

Power Supply for PLL Clocks

MEMORY INTERFACE

MA[11:0]

I/O

Memory Address

RAS#[3:0]

Row Address Strobe

CAS#[7:0]

Column Address Strobe

MWE#

Write Enable

MD[63:0]

I/O

Memory Data

LOCAL BUS INTERFACE (COMBINED WITH ISA BUS )

PA[21:0]*

Address Bus [21:0]

PD[15:0]*

I/O

Data Bus [15:0]

PRDY#*

Ready

PWR#[1:0]*

Memory and I/O Write signals

PRD#[1:0]*

Memory and I/O Read signals

FCS#[1:0]*, IOCS#[3:0]*

Flash Memory and I/O Chip Select

ISA BUS INTERFACE (COMBINED WITH LOCAL BUS, PARALLEL PORT, SERIAL INTERFACE)

LA[23:17]*

Unlatched Address

SA[19:0]*

Latched Address

SD[15:0]*

I/O

Data Bus

IOCHRDY*

I/O Channel Ready

ALE*

Address Latch Enable

BHE#*

System Bus High Enable

MEMR#*, MEMW#*

I/O

Memory Read & Write

SMEMR#*, SMEMW#*

System Memory Read and Write

IOR#*, IOW#*

I/O

I/O Read and Write

MASTER#*

Add On Card Owns Bus

MCS16#*, IOCS16#*

Memory Chip Select 16, I/O Chip Select 16

REF#*

Refresh Cycle

AEN*

Address Enable

IOCHCK#*

I/O Channel Check (ISA)

RTCRW#*

RTC Read / Write#

RTCDS#*

RTC Data Strobe

RTCAS#*

RTC Address Strobe

STPCINDUSTRIAL 数据表(PDF) 18 Page - STMicroelectronics

STPCINDUSTRIAL 数据表(HTML) 18 Page - STMicroelectronics

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