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STPCINDUSTRIAL 数据表(PDF) 37 Page - STMicroelectronics |
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STPCINDUSTRIAL 数据表(HTML) 37 Page - STMicroelectronics |
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37 / 55 page  ELECTRICAL SPECIFICATIONS 37/55 Issue 1.1 Table 4-5. DRAM Bus AC Timing Name Parameter Min Max Unit t1 HCLK to RAS#[3:0] valid 16 ns t2 HCLK to CAS#[7:0] bus valid 16 ns t3 HCLK to MA[11:0] bus valid 16 ns t4 HCLK to MWE# valid 16 ns t5 HCLK to MD[63:0] bus valid 16 ns t6 MD[63:0] Generic setup 9 ns t7 GCLK2X to RAS#[3:0] valid 17 ns t8 GCLK2X to CAS#[7:0] valid 17 ns t9 GCLK2X to MA[11:0] bus valid 17 ns t10 GCLK2X to MWE# valid 17 ns t11 GCLK2X to MD[63:0] bus valid 17 ns t12 MD[63:0] Generic hold 5 ns Table 4-6. PCI Interface AC TImings Name Parameter Min Max Unit t13 PCI_CLKI to FRAME# valid 15 nS t14 PCI_CLKI to TRDY# valid 15 nS t15 PCI_CLKI to IRDY# valid 15 nS t16 PCI_CLKI to STOP# valid 15 nS t17 PCI_CLKI to DEVSEL# valid 15 nS Table 4-7. Graphics Adapter (VGA) AC Timing Name Parameter Min Max Unit t18 DCLK to VSYNC valid 27 ns t19 DCLK to HSYNC valid 27 ns Table 4-8. IPC Interface AC Timings Name Parameter Min Max Unit t20 XTALO to DACK_EN[2:0] valid 71 nS t21 XTALO to TC valid 68 nS t22 IRQ_MUX Input setup to ISACLK2X 0 - nS t23 DREQ_MUX[1:0] Input setup to ISACLK2X 0 - nS |
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