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STPCINDUSTRIAL 数据表(PDF) 20 Page - STMicroelectronics |
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STPCINDUSTRIAL 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 55 page ![]() PIN DESCRIPTION 20/55 Issue 1.1 CE1#*, CE2#* O Card Enable 2 VS1#*, VS2#* I Voltage Sense 2 VCC5_EN* O Power Switch control : 5v power 1 VCC3_EN* O Power Switch control : 3.3v power 1 VPP_PGM* O Power Switch control : Program power 1 VPP_VCC* O Power Switch control : VCC power 1 CARDBUS INTERFACE (COMBINED WIT H PCI / PCMCIA) CCLKRUN* I/O Clock 1 CRST#* O Reset 1 CSTSCHG#* I System Change 1 CAD[31:0]* I/O Address / Data 32 CBE[3:0]* I/O Bus Commands / Byte Enables 4 CFRAME#* I/O Cycle Frame 1 CTRDY#* I/O Target Ready 1 CIRDY#* I/O Initiator Ready 1 CSTOP#* I/O Stop Transaction 1 CDEVSEL#* I/O Device Select 1 CPAR* I/O Parity Signal Transactions 1 CSERR#* I System Error 1 CPERR#* I/O Parity Error 1 CBLOCK#* I/O PCI Lock 1 CCD[2:1]* I Card Detect 2 CINT#* I Interrupt Request 1 CREQ#* I Request 1 CGNT#* O Grant 1 PCI INTERFACE (COMBINED WITH PCMCIA / CARDBUS) AD[31:0]* I/O Address / Data 32 BE[3:0]* I/O Bus Commands / Byte Enables 4 FRAME#* I/O Cycle Frame 1 TRDY#* I/O Target Ready 1 IRDY#* I/O Initiator Ready 1 STOP#* I/O Stop Transaction 1 DEVSEL#* I/O Device Select 1 PAR* I/O Parity Signal Transactions 1 SERR#* O System Error 1 LOCK#* I PCI Lock 1 PCI_REQ#[2:0]* I PCI Request 3 PCI_GNT#[2:0]* O PCI Grant 3 PCI_INT[3:0]* I PCI Interrupt Request 4 Table 3-2. Definition of Signal Pins Signal Name Dir Description Qty |
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