STPC4EDBC datasheet(12/93 Pages) STMICROELECTRONICS

12 / 93 page

PIN DESCRIPTION

12/93

Release 1.5 - January 29, 2002

Table 2-2. Definition of Signal Pins

Signal Name

Dir

Buffer Type2

Description

Qty

BASIC CLOCKS AND RESETS

SYSRSETI#

SCHMITT_FT

System Power Good Input

SYSRSTO#

BD8STRP_FT

System Reset Output

XTALI

ANA

14.3 MHz Crystal Input- External

Oscillator Input

XTALO

I/O

OSCI13B

14.3 MHz Crystal Output

HCLK

I/O

BD4STRP_FT

Host Clock (Test)

DEV_CLK

BT8TRP_TC

24 MHz Peripheral Clock (floppy drive)

DCLK

I/O

BD4STRP_FT

27-135 MHz Graphics Dot Clock

VDD_xxx_PLL

VDDCO

Power Supply for PLL Clocks

SDRAM CONTROLLER

MCLKI

TLCHT_TC

Memory Clock Input

MCLKO

BT8TRP_TC

Memory Clock Output

CS#[1:0]

BD8STRP_TC

DIMM Chip Select

CS2# / MA11

BD16STARUQP_TC

DIMM Chip Select / Memory Address

CS3# / MA12 / BA1

BD16STARUQP_TC

DIMM Chip Select / Memory Address /

Bank Address

BA[0]

BD8STRP_TC

Bank Address

MA[10:0]

BD16STARUQP_TC

Memory Row & Column Address

MD[63:49]

I/O

BD8STRUP_FT

Memory Data

MD[48:1]

I/O

BD8TRP_TC

Memory Data

MD[0]

I/O

BD8STRUP_FT

Memory Data

RAS#[1:0]

BD16STARUQP_TC

Row Address Strobe

CAS#[1:0]

BD16STARUQP_TC

Column Address Strobe

MWE#

BD16STARUQP_TC

Write Enable

DQM[7:0]

BD8STRP_TC

Data Input/Output Mask

PCI CONTROLLER

PCI_CLKI

TLCHT_FT

33 MHz PCI Input Clock

PCI_CLKO

BT8TRP_TC

33 MHz PCI O/P Clk (from internal PLL)

AD[31:0]

I/O

BD8PCIARP_FT

PCI Address / Data

CBE[3:0]

I/O

BD8PCIARP_FT

Bus Commands / Byte Enables

FRAME#

I/O

BD8PCIARP_FT

Cycle Frame

IRDY#

I/O

BD8PCIARP_FT

Initiator Ready

TRDY#

I/O

BD8PCIARP_FT

Target Ready

LOCK#

TLCHT_FT

PCI Lock

DEVSEL#

I/O

BD8PCIARP_FT

Device Select

STOP#

I/O

BD8PCIARP_FT

Stop Transaction

PAR

I/O

BD8PCIARP_FT

Parity Signal Transactions

SERR#

BD8PCIARP_FT

System Error

PCIREQ#[2:0]

BD8PCIARP_FT

PCI Request

PCIGNT#[2:0]

BD8PCIARP_FT

PCI Grant

PCI_INT#[3:0]

BD4STRUP_FT

PCI Interrupt Request

Note1: These pins are must be connected to the 2.5 V power supply. They must not be connected to the 3.3 V supply.

Note2: See Table 2-3 for buffer type descriptions

STPC4EDBC 数据表(PDF) 12 Page - STMicroelectronics

STPC4EDBC 数据表(HTML) 12 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93

数据表下载

链接网址

STPC4EDBC 数据表(PDF) 12 Page - STMicroelectronics

STPC4EDBC 数据表(HTML) 12 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93

数据表 下载

链接网址

数据表下载