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STPC4EDBC 数据表(PDF) 23 Page - STMicroelectronics |
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STPC4EDBC 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 93 page  PIN DESCRIPTION Release 1.5 - January 29, 2002 23/93 PCI_GNT#[2:0] High ISA BUS INTERFACE ISAOE# High Low RMRTCCS# Hi-Z First prefetch cycles when in ISA or PCMCIA mode. Address start is 0xFFFFF0 LA[23:17] Unknown 0x00 SA[19:0] 0xFFFXX 0xFFF03 SD[15:0] Unknown 0xFF BHE#, MEMR# Unknown High MEMW#, SMEMR#, SMEMW#, IOR#, IOW# Unknown High REF# Unknown High ALE, AEN Low DACK_ENC[2:0] Input 0x04 TC Input Low GPIOCS# Hi-Z High RTCDS#, RTCRW#, KBCS# Hi-Z RTCAS Unknown Low LOCAL BUS INTERFACE PA[24:0] Unknown First prefetch cycles PD[15:0] Unknown 0xFF PRD# Unknown High PBE#[1:0], FCS0#, FCS_0H# High FCS_0L#, FCS1#, FCS_1H#, FCS_1L# High PWR#, IOCS#[7:0] High IDE CONTROLLER DD[15:0] 0xFF DA[2:0] Unknown Low PCS1, PCS3, SCS1, SCS3 Unknown Low PDACK#, SDACK# High PDIOR#, PDIOW#, SDIOR#, SDIOW# High VGA CONTROLLER RED, GREEN, BLUE Black VSYNC, HSYNC Low COL_SEL Unknown TV OUTPUT RED_TV, GREEN_TV, BLUE_TV Black CVBS Black VCS Low ODD_EVEN Low I2C INTERFACE SCL / DDC[1] Input SDA / DDC[0] Input JTAG TDO High MISCELLANEOUS SPKRD Low Table 2-6. Signal value on Reset Signal Name SYSRSTI# active SYSRSTI# inactive SYSRSTO# active release of SYSRSTO# |
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