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STPC4EDBC 数据表(PDF) 53 Page - STMicroelectronics |
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STPC4EDBC 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 93 page ![]() ELECTRICAL SPECIFICATIONS Release 1.5 - January 29, 2002 53/93 4.5.10 IDE INTERFACE Table 4-18 lists the AC characteristics of the IDE interface. 4.5.11 JTAG INTERFACE Figure 4-12 and Table 4-17 list the AC characteristics of the JTAG interface. Table 4-18. IDE Interface Timing Name Parameters Min Max Units DD[15:0] setup to PIOR#/SIOR# falling 15 - ns DD[15:0} hold to PIOR#/SIOR# falling 0 - ns Figure 4-12. JTAG timing diagram Table 4-19. JTAG AC Timings Name Parameter Min Max Unit Treset TRST pulse width 1 Tcycle Tcycle TCLK period 400 ns TCLK rising time 20 ns TCLK falling time 20 ns TCK STPC.input TRST Treset Tcycle STPC.output TMS,TDI TDO Tjset Tjhld Tjout Tpset Tphld Tpout |
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