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AT52SC1283J 数据表(PDF) 13 Page - ATMEL Corporation |
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AT52SC1283J 数据表(HTML) 13 Page - ATMEL Corporation |
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13 / 52 page ![]() 13 3530B–STKD–2/4/05 AT52SC1283J/1284J [Preliminary] mal read operation from an address within the protection register. After determining whether a register is protected or not or reading the protection register, the Read command must be given to return to the read mode. 6.17 Common Flash Interface (CFI) CFI is a published, standardized data structure that may be read from a flash device. CFI allows system software to query the installed device to determine the configurations, various electrical and timing parameters, and functions supported by the device. CFI is used to allow the system to learn how to interface to the flash device most optimally. The two primary benefits of using CFI are ease of upgrading and second source availability. The command to enter the CFI Query mode is a one-bus cycle command which requires writing data 98h to any address. The CFI Query command can be written when the device is ready to read data or can also be written when the part is in the product ID mode. Once in the CFI Query mode, the system can read CFI data at the addresses given in Table 27. on page 33. To return to the read mode, the read com- mand should be issued. 6.18 Hardware Data Protection Hardware features protect against inadvertent programs to the AT52SC1283J/1284J in the fol- lowing ways: (a) V CC sense: if VCC is below 1.2V (typical), the device is reset and the program and erase functions are inhibited. (b) VCC power-on delay: once VCC has reached the VCC sense level, the device will automatically time-out 10 ms (typical) before programming. (c) Program inhibit: holding any one of OE low, CE high or WE high inhibits program cycles. (d) Noise filter: pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a program cycle. (e) V PP is less than VILPP. 6.19 Input Levels While operating with a 1.7V to 1.95V power supply, the address inputs and control inputs (OE, CE and WE) may be driven from 0 to 2.5V without adversely affecting the operation of the device. The I/O lines can be driven from 0 to V CCQ + 0.3V. 6.20 Output Levels For the AT52SC1283J/1284J, output high levels are equal to V CCQ - 0.1V (not VCC). VCCQ must be regulated between 1.8V - 1.95V. |
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