AT52SC1283J datasheet(39/52 Pages) ATMEL

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3530B–STKD–2/4/05

AT52SC1283J/1284J [Preliminary]

VENDOR SPECIFIC EXTENDED QUERY

41h

0050h

“P”

42h

0052h

“R”

43h

0049h

“I”

44h

0031h

Major version number, ASCII

45h

0030h

Minor version number, ASCII

46h

00BFh

Bit 0 – chip erase supported, 0 – no, 1 – yes

Bit 1 – erase suspend supported, 0 – no, 1 – yes

Bit 2 – program suspend supported, 0 – no, 1 – yes

Bit 3 – simultaneous operations supported, 0 – no, 1 – yes

Bit 4 – burst mode read supported, 0 – no, 1 – yes

Bit 5 – page mode read supported, 0 – no, 1 – yes

Bit 6 – queued erase supported, 0 – no, 1 – yes

Bit 7 – protection bits supported, 0 – no, 1 – yes

47h

0002h

Bit 8 – top (“0”), bottom (“1”), or both top and bottom (“2”) boot block device

Undefined bits are “0”

48h

000Fh

Bit 0 – 4 word linear burst with wrap around, 0 – no, 1 – yes

Bit 1 – 8 word linear burst with wrap around, 0 – no, 1 – yes

Bit 2 – 16 word linear burst with wrap around, 0 – no, 1 – yes

Bit 3 – continuos burst, 0 – no, 1 – yes

Undefined bits are “0”

49h

0001h

Bit 0 – 4 word page, 0 – no, 1 – yes

Bit 1 – 8 word page, 0 – no, 1 – yes

Undefined bits are “0”

4Ah

0080h

Location of protection register lock byte, the section’s first byte

4Bh

0003h

# of bytes in the factory prog section of prot register – 2*n

4Ch

0007h

# of bytes in the user prog section of prot register – 2*n – 132

4Dh

0020h

Number of planes – 32 planes

37. Common Flash Interface Definition Table (Continued)

Address

AT52SC1283J/1284J

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