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LTC4261IGN 数据表(PDF) 13 Page - Linear Technology |
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LTC4261IGN 数据表(HTML) 13 Page - Linear Technology |
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13 / 32 page  LTC4261/LTC4261-2 13 42612fb 22 1 6 5 28 27 4 3 VEE R6 100k RIN 8 × 240Ω IN SERIES 1/4W EACH CVCC 0.1 µF VEE CIN 1 µF MOC207 21 723 R8 7.5k R7A 10k R7B 10k R9 5.1k R7 100k R24 5.1k R23 1k R22 1k R17 100k 1% Q11 2N5401 OUTPUT SENSE Q12 2N5401 R19 2.49k 1% VEE VEE VOUT VOUT VOUT R20 2.49k 1% R18 100k 1% R4 20k R21 1k 5V LUCENT FLTR100V10 VIN + –48V RTN OUTPUT VIN – CASE VOUT + VOUT – MICRO- CONTROLLER VDD GND SCL SDA ALERT MBRM5100 CL 4000 µF 100V 0V TRANSIENT RESEVOIR CAPACITOR RST LUCENT JW050A1-E VIN + VIN – VEE Q5 MOC207 ON/OFF CASE LTC2900 SUPPLY MONITOR VDD RST GND VOUT + VOUT – RL 343 Ω 7 × 2.4k, 0805 EACH 28.7W + Q8 A B ANODE VCC Q3 HCPL-0300 GND CATHODE RL VOUT ANODE VCC Q4 Q6 Q7 42612 F02b 5V PS9113 PS9113 6N139 CATHODE VO VO VCC GND ANODE CATHODE VO VCC ANODE CATHODE GND GND FLTIN PGI SCL SDAI PGIO PG SDAO ALERT LTC4261CGN VIN INTVCC ADIN Figure 2b. 200W AdvancedTCA Hot Swap Controller with Input/Output Monitoring and Power Good Watchdog Using LTC4261 in I2C Mode (Part Two) the voltage at VIN to 11.2V (VZ) and provides power to the GATE driver. The data converter and logic control circuits are powered by an internal linear regulator that derives 5V from the 11.2V supply. The 5V output is available at the INTVCC pin for driving external circuits (up to 20mA load current). Bypass capacitors of 1µF and 0.1µF are recommended at VIN and INTVCC, respectively. RIN should be chosen to accommodate the maximum supply current require- ment of the LTC4261/LTC4261-2 (5mA) plus the supply current required by any external devices driven by the VIN and INTVCC pins at the minimum intended operation voltage. R VV II IN VMIN Z MAX IN MAX EXTERNAL ≤ + 48 ( ) ( ) () – The maximum power dissipation in the resistor is: P VV R MAX VMAX Z MIN IN = () 48 2 () ( ) – If the power dissipation is too high for a single resistor, use multiple low power resistors in series. Initial Start-Up and Inrush Control Several conditions must be satisfied before the FET turn-on sequence is started. First the voltage at VIN must exceed its 9V undervoltage lockout level. Next the internal supply INTVCC must cross its 4.25V undervoltage lockout level. This generates a 100µs to 160µs power-on-reset pulse during which the FAULT register bits are cleared and the CONTROL register bits are set or cleared as described in the register section. After the power-on-reset pulse, the voltages at the UVH, UVL and OV pins must satisfy UVH > 2.56V, UVL > 2.291V and OV < 1.77V to indicate that the input power is within the acceptable range and the EN pin must be pulled low. All the above conditions must be satisfied throughout the duration of the start-up debounce delay that is set by an external capacitor (CTMR) connected to the TMR pin. CTMR is charged with a pull-up current of 10µA until the voltage at TMR reaches 2.56V. CTMR is then quickly discharged with a 12mA current. The initial delay expires when TMR is brought below 75mV. The duration of the start-up delay is given by: tms C µF D TMR = 256 1 • APPLICATIONS INFORMATION |
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