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LTC2925IGN 数据表(PDF) 7 Page - Linear Technology

部件名 LTC2925IGN
功能描述  Multiple Power Supply Tracking Controller with Power Good Timeout
PDF  20 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC2925IGN 数据表(HTML) 7 Page - Linear Technology

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LTC2925
7
2925f
APPLICATIO S I FOR ATIO
Power Supply Tracking and Sequencing
The LTC2925 handles a variety of power-up profiles to
satisfy the requirements of digital logic circuits including
FPGAs, PLDs, DSPs and microprocessors. These require-
ments fall into one of the four general categories illus-
trated in Figures 1 to 4.
Some applications require that the potential difference
between two power supplies must never exceed a speci-
fied voltage. This requirement applies during power-up
and power-down as well as during steady-state operation,
often to prevent destructive latch-up in a dual supply IC.
Typically, this is achieved by ramping the supplies up and
down together (Figure 1). In other applications it is desir-
able to have the supplies ramp up and down with fixed
voltage offsets between them (Figure 2) or to have them
ramp up and down ratiometrically (Figure 3).
Certain applications require one supply to come up after
another. For example, a system clock may need to start
before a block of logic. In this case, the supplies are se-
quenced as in Figure 4 where the 1.8V supply ramps up
completely followed by the 2.5V supply and then the 1.5V
supply.
Operation
The LTC2925 provides a simple solution to all of the power
supply tracking and sequencing profiles shown in Figures
1 to 4. A single LTC2925 controls up to four supplies with
three “slave” supplies that track a “master” signal. With
just two resistors, a slave supply is configured to ramp up
as a function of the master signal. This master signal can
be a fourth supply that is ramped up through an external
FET, whose ramp rate is set with a single capacitor, or it can
be a signal generated by tying the GATE and RAMP pins to
an external capacitor.
SLAVE1
SLAVE2
SLAVE3
10ms/DIV
2925 F02
10ms/DIV
2925 F01
1V/DIV
Figure 1. Coincident Tracking
Figure 3. Ratiometric Tracking
Figure 2. Offset Tracking
Figure 4. Supply Sequencing
SLAVE1
SLAVE2
SLAVE3
10ms/DIV
2925 F04
10ms/DIV
2925 F03
2V/DIV
1V/DIV
2V/DIV
MASTER
MASTER
SLAVE1
SLAVE2
SLAVE3
MASTER
SLAVE2
SLAVE1
SLAVE3



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