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LTC2925IGN 数据表(PDF) 11 Page - Linear Technology |
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LTC2925IGN 数据表(HTML) 11 Page - Linear Technology |
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11 / 20 page ![]() LTC2925 11 2925f Status Output The STATUS pin provides an indication that the supplies are finished ramping up. This pin is an open-drain output that pulls low until the GATE has been fully charged. Since the GATE pin drives the gate of the external FET, or the RAMP pin directly when no FET is used, the supplies are completely ramped up when the GATE pin is fully charged. The STATUS pin will go low again when the GATE pin is pulled low, either because of a short-circuit fault, a power good timeout fault, or because the ON pin has been pulled low. Fault Output The FAULT pin is an open-drain output that pulls low when the electronic circuit breaker is activated due to a short- circuit or power good timeout fault. FAULT is reset by pulling ON below 0.4V. The supplies will not be allowed to ramp up again until the SCTMR, PGTMR, and SDTMR pins are below about 100mV, and the ON pin is pulled above 1.23V. APPLICATIO S I FOR ATIO RSENSE Q1 0.1 µF CPGTMR VCC SENSEP SENSEN VIN VIN RONB VIN RTB1 RTB2 RFA2 SLAVE2 MASTER RFB2 RTA2 RTB3 RTA3 RTA1 RONA RAMPBUF TRACK1 TRACK2 TRACK3 FB2 GATE LTC2925 PGTMR CSDTMR SDTMR CSCTMR SCTMR GND 2925 F09 RAMP RFA3 SLAVE3 RFB3 DC/DC IN FB OUT DC/DC IN FB RUN/SS RUN/SS OUT FB3 VIN PGI RFA1 SLAVE1 RFB1 SUPPLY MONITOR DC/DC IN FB RUN/SS OUT FB1 FAULT ON 10k VIN STATUS REMOTE RST SD3 SD2 SD1 CGATE 10 Ω Figure 9. Retry on Fault Retry on Fault The LTC2925 continuously attempts to ramp up the out- puts after a fault if the FAULT pin is tied to the ON pin (Figure 9). If a short-circuit fault occurs in this configura- tion, the SCTMR pin ramps up the CSCTMR capacitor with 50 µA until it reaches 1.23V. Then, GATE is pulled low turn- ing off the shorted FET. At the same time, the FAULT pin’s open-drain output pulls ON low. The CSCTMR capacitor is pulled down with 2 µA until it reaches about 100mV. After the CSCTMR capacitor reaches 100mV, the shutdown timer begins and upon completing a shutdown timer cycle, the supplies start ramping up again. If there is no short-circuit this time, the supplies will come up normally. Otherwise, the retry cycle will repeat. If a longer off time is required between retry attempts, the CSDTMR capacitor value can be increased, providing a greater delay before the FET’s GATE ramps up on each cycle. Note that tying FAULT to ON also causes the LTC2925 to retry on Power Good Timeout faults. In this mode, verify that the slave supplies’ current limits provide sufficient protection under short-circuit conditions. |
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