TSB12C01APZ datasheet(12/59 Pages) TI

部件名	TSB12C01APZ

功能描述	High-Speed Serial-Bus Link-Layer Controller

PDF	59 Pages

Scroll/Zoom	100%

制造商	TI [Texas Instruments]

网页	http://www.ti.com

标志

12 / 59 page

1–6

Table 1–1. Terminal Functions (Continued)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

NTBIHIZ

NAND-tree bidirectional 3-state output. When NTBIHIZ is deasserted (low), the

bidirectional I/Os operate in a normal state. When NTBIHZ is asserted (high), the

bidirectional I/Os are in the 3-state output mode. (This is a manufacturing

test-mode condition and should be grounded under normal operating conditions.)

NTCLK

NAND clock input. The NAND-tree clock is used for VIH and VIL manufacturing

tests. (This input should be grounded under normal operating conditions.)

NTOUT

NAND-tree output. This output should remain open under normal operating

conditions.

RESET

Reset (active low). RESET is the asynchronous reset to the TSB12C01A.

VCC

6, 16, 26,

33, 43, 56,

64, 74, 86,

5-V

±5% power supplies

TSB12C01APZ 数据表(PDF) 12 Page - Texas Instruments