ADCLK846

Rev. A | Page 9 of 16

900

400

500

600

700

800

INPUT FREQUENCY (MHz)

Figure 9. LVDS Differential Output Swing vs. Input Frequency

150

125

100

75

50

25

0

0

200

400

600

800

1000

1200

1400

1600

1800

FREQUENCY (MHz)

Figure 10. LVDS Current vs. Frequency, All Banks Set to LVDS

500

450

400

350

300

250

200

150

100

50

0

02

2.0

1.5

1.0

0.5

INPUT SLEW RATE (V/ns)

.5

Figure 11. Additive Broadband Jitter vs. Input Slew Rate

–80

–90

–100

–110

–120

–130

–140

–150

–160

–170

–180

10

100M

10M

1M

100k

10k

1k

100

FREQUENCY OFFSET (Hz)

ABSOLUTE PHASE NOISE MEASURED @ 1GHz WITH AGILENT

E5052 USING WENZEL CLOCK SOURCE CONSISTING OF A

WENZEL 100MHz CRYSTAL OSCILLATOR (P/N 500-06672),

WENZEL 5× MULTIPLIER (P/N LNOM-100-5-13-14-F-A), AND A

WENZEL 2× MULTIPLIER (P/N LNDD-500-14-14-1-D).

CLOCK SOURCE

ADCLK846

Figure 12. Absolute Phase Noise LVDS at 1000 MHz

200

0

50

100

150

25

50

75

100

125

150

175

225

200

250

FREQUENCY (MHz)

BOTH BANKS CMOS

BANK A CMOS,

BANK B LVDS

BANK A LVDS,

BANK B CMOS

BOTH BANKS LVDS

Figure 13. LVDS/CMOS Current vs. Frequency with Various Logic

Combinations

55

45

46

47

48

49

50

51

52

53

54

0

50

100

150

200

250

FREQUENCY (MHz)

Figure 14. CMOS Output Duty Cycle vs. Frequency, 10 pF Load