STM32F107VC datasheet(68/95 Pages) STMICROELECTRONICS

68 / 95 page

Electrical characteristics

STM32F105xx, STM32F107xx

68/95

Doc ID 15274 Rev 4

CAN (controller area network) interface

Refer to Section 5.3.12: I/O port characteristics for more details on the input/output alternate

function characteristics (CANTX and CANRX).

5.3.16

12-bit ADC characteristics

Unless otherwise specified, the parameters given in Table 51 are derived from tests

performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage

conditions summarized in Table 9.

Note:

It is recommended to perform a calibration after each power-up.

Table 50.

Dynamics characteristics: Ethernet MAC signals for MII(1)

1. TBD stands for to be determined.

Symbol

Rating

Min

Typ

Max

Unit

tsu(RXD)

Receive data setup time

TBD

tih(RXD)

Receive data hold time

TBD

tsu(DV)

Data valid setup time

TBD

tih(DV)

Data valid hold time

TBD

tsu(ER)

Error setup time

TBD

tih(ER)

Error hold time

TBD

td(TXEN)

Transmit enable valid delay time

13.4

15.5

17.7

td(TXD)

Transmit data valid delay time

12.9

16.1

19.4

Table 51.

ADC characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Power supply

2.4

3.6

VREF+ Positive reference voltage

2.4

VDDA

IVREF

Current on the VREF input pin

160(1)

220(1)

µA

fADC

ADC clock frequency

0.6

MHz

(2)

Sampling rate

0.05

MHz

fTRIG

(2)

External trigger frequency

fADC = 14 MHz

823

kHz

1/fADC

VAIN

Conversion voltage range(3)

0 (VSSA or VREF-

tied to ground)

VREF+

RAIN

(2)

External input impedance

See Equation 1 and

Table 52 for details

RADC

(2)

Sampling switch resistance

CADC

(2)

Internal sample and hold capacitor

tCAL

(2)

Calibration time

fADC = 14 MHz

5.9

µs

1/fADC

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