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ATmega16HVB 数据表(PDF) 171 Page - ATMEL Corporation |
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ATmega16HVB 数据表(HTML) 171 Page - ATMEL Corporation |
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171 / 273 page  171 8042A–AVR–07/09 ATmega16HVB/32HVB Figure 27-12. Formats and States in the Master Transmitter Mode S SLA W A DATA A P $08 $18 $28 R SLA W $10 AP $20 P $30 A or A $38 A Other master continues A or A $38 Other master continues R A $68 Other master continues $78 $B0 To corresponding states in slave mode MT MR Successfull transmission to a slave receiver Next transfer started with a repeated start condition Not acknowledge received after the slave address Not acknowledge received after a data byte Arbitration lost in slave address or data byte Arbitration lost and addressed as slave DATA A n From master to slave From slave to master Any number of data bytes and their associated acknowledge bits This number (contained in TWSR) corresponds to a defined state of the Two-wire Serial Bus. The prescaler bits are zero or masked to zero S |
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