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ATmega16HVB 数据表(PDF) 61 Page - ATMEL Corporation |
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ATmega16HVB 数据表(HTML) 61 Page - ATMEL Corporation |
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61 / 273 page ![]() 61 8042A–AVR–07/09 ATmega16HVB/32HVB • Bit 7:0 – PCINT11:4: Pin Change Enable Mask 15..8 These bits select whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT11:4 is set and the PCIE1 bit in EIMSK is set, pin change interrupt is enabled on the cor- responding I/O pin. If PCINT11:4 is cleared, pin change interrupt on the corresponding I/O pin is disabled. 13.2.7 PCMSK0 – Pin Change Mask Register 0 • Bits 7:4 – RES: Reserved Bits These bits are reserved bits ins the ATmega16HVB/32HVB, and will always read as zero. • Bit 3:0 – PCINT3:0: Pin Change Enable Mask 3:0 Each PCINT3:0 bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT3:0 is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the cor- responding I/O pin. If PCINT3:0 is cleared, pin change interrupt on the corresponding I/O pin is disabled. Bit 7 65 43 21 0 (0x6B) - - - - PCINT3 PCINT2 PCINT1 PCINT0 PCMSK0 Read/Write R R R R R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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