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ATmega16HVB 数据表(PDF) 40 Page - ATMEL Corporation |
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ATmega16HVB 数据表(HTML) 40 Page - ATMEL Corporation |
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40 / 273 page  40 8042A–AVR–07/09 ATmega16HVB/32HVB These bits select between the four available sleep modes as shown in Table 10-3. • Bit 0 – SE: Sleep Enable The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of the SLEEP instruction and to clear it immediately after waking up. 10.8.2 PRR0 – Power Reduction Register 0 • Bit 7, 4 - Res: Reserved bits These bits are reserved for future use. For compatibility with future devices, these bits must be written to zero when PRR0 is written. • Bit 6 - PRTWI: Power Reduction TWI Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When waking up the TWI again, the TWI should be re initialized to ensure proper operation. • Bit 5 - PRVRM: Power Reduction Voltage Regulator Monitor Writing a logic one to this bit shuts down the Voltage Regulator Monitor interface by stopping the clock of the module. • Bit 3 - PRSPI: Power Reduction Serial Peripheral Interface Writing logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to the module. When waking up the SPI again, the SPI should be reinitialized to ensure proper operation. • Bit 2 - PRTIM1: Power Reduction Timer/Counter1 Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1 is enabled, operation will continue like before the shutdown. Table 10-3. Sleep Mode Select SM2 SM1 SM0 Sleep Mode 000 Idle 0 0 1 ADC Noise Reduction 010 Reserved 011 Power-save 100 Power-off 101 Reserved 110 Reserved 111 Reserved Bit 7 6 5 4 3 2 1 0 (0x64) – PRTWI PRVRM – PRSPI PRTIM1 PRTIM0 PRVADC PRR0 Read/Write R R/W R/W R R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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