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ATmega16HVB 数据表(PDF) 32 Page - ATMEL Corporation |
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ATmega16HVB 数据表(HTML) 32 Page - ATMEL Corporation |
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32 / 273 page  32 8042A–AVR–07/09 ATmega16HVB/32HVB 9.8 Register Description 9.8.1 FOSCCAL – Fast RC Oscillator Calibration Register • Bits 7:0 – FCAL7:0: Fast RC Oscillator Calibration Value The Fast RC Oscillator Calibration Register is used to trim the Fast RC Oscillator to remove pro- cess variations from the oscillator frequency. The factory-calibrated value is automatically written to this register during chip reset, giving an oscillator frequency of approximately 8.0 MHz at 25°C. The application software can write this register to change the oscillator frequency. The oscillator can be run-time calibrated to any frequency in the range 7.3 - 8.1 MHz. Calibration out- side that range is not guaranteed. Note that this oscillator is used to time EEPROM and Flash write accesses, and these write times will be affected accordingly. If the EEPROM or Flash are written, do not calibrate to more than 8.1 MHz. Otherwise, the EEPROM or Flash write may fail. The FCAL[7:5] bits determine the range of operation for the oscillator. Setting these bits to 0b000 gives the lowest frequency range, setting this bit to 0b111 gives the highest frequency range. The frequency ranges are overlapping. A setting of for instance FOSCCAL = 0x1F gives a higher frequency than FOSCCAL = 0x20. The FCAL[4:0] bits are used to tune the frequency within the selected range. A setting of 0x00 gives the lowest frequency in that range, and a setting of 0x1F gives the highest frequency in the range. Incrementing FCAL[4:0] by 1 will give a frequency increment of less than 1% in the fre- quency range 7.3 - 8.1 MHz. With an accurate time reference, an oscillator accuracy of ±0.5% can be achieved after calibration. The frequency will drift with temperature, so run-time calibra- tion will be required to maintain the accuracy. Refer to ”OSI – Oscillator Sampling Interface” on page 29 for details. 9.8.2 MCUCR – MCU Control Register • Bit 5 – CKOE: Clock Output When this bit is written to one, the CPU clock divided by 2 is output on the PB1 pin. 9.8.3 CLKPR – Clock Prescale Register Bit 765 43210 (0x66) FCAL7 FCAL6 FCAL5 FCAL4 FCAL3 FCAL2 FCAL1 FCAL0 FOSCCAL Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value Device Specific Calibration Value Bit 7 6 5 4 3 2 1 0 0x35 (0x55) -– – CKOE PUD – – IVSEL IVCE MCUCR Read/Write R R R/W R/W R R R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 6543 2 1 0 (0x61) CLKPCE – – – – – CLKPS1 CLKPS0 CLKPR Read/Write R/W RRR RR R/W R/W Initial Value 0 0000 0 1 1 |
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