ATtiny10 datasheet(32/168 Pages) ATMEL

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8127C–AVR–10/09

ATtiny4/5/9/10

8.4

8.4.1

WDTCSR – Watchdog Timer Control and Status Register

• Bit 7 – WDIF: Watchdog Timer Interrupt Flag

This bit is set when a time-out occurs in the Watchdog Timer and the Watchdog Timer is config-

ured for interrupt. WDIF is cleared by hardware when executing the corresponding interrupt

handling vector. Alternatively, WDIF is cleared by writing a logic one to the flag. When the WDIE

is set, the Watchdog Time-out Interrupt is requested.

• Bit 6 – WDIE: Watchdog Timer Interrupt Enable

When this bit is written to one, the Watchdog interrupt request is enabled. If WDE is cleared in

combination with this setting, the Watchdog Timer is in Interrupt Mode, and the corresponding

interrupt is requested if time-out in the Watchdog Timer occurs.

If WDE is set, the Watchdog Timer is in Interrupt and System Reset Mode. The first time-out in

the Watchdog Timer will set WDIF. Executing the corresponding interrupt vector will clear WDIE

and WDIF automatically by hardware (the Watchdog goes to System Reset Mode). This is use-

ful for keeping the Watchdog Timer security while using the interrupt. To stay in Interrupt and

System Reset Mode, WDIE must be set after each interrupt. This should however not be done

within the interrupt service routine itself, as this might compromise the safety-function of the

Watchdog System Reset mode. If the interrupt is not executed before the next time-out, a Sys-

tem Reset will be applied.

Note:

1. WDTON configuration bit set to “0“ means programmed and “1“ means unprogrammed.

• Bit 4 – Res: Reserved Bit

This bit is reserved and will always read zero.

• Bit 3 – WDE: Watchdog System Reset Enable

WDE is overridden by WDRF in MCUSR. This means that WDE is always set when WDRF is

set. To clear WDE, WDRF must be cleared first. This feature ensures multiple resets during con-

ditions causing failure, and a safe start-up after the failure.

Bit

765

4321

0x31

WDIF

WDIE

WDP3

–

WDE

WDP2

WDP1

WDP0

WDTCSR

Read/Write

R/W

Initial Value

Table 8-2.

Watchdog Timer Configuration

WDTON(1)

WDE

WDIE

Mode

Action on Time-out

Stopped

None

Interrupt Mode

Interrupt

System Reset Mode

Reset

111

Interrupt and System

Reset Mode

Interrupt, then go to

System Reset Mode

Reset

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