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AS5130ASST 数据表(PDF) 16 Page - ams AG |
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AS5130ASST 数据表(HTML) 16 Page - ams AG |
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16 / 40 page ![]() www.austriamicrosystems.com Revision 1.09 16 - 40 AS5130 Data Sheet - D e ta i l e d D e s c r i p t i o n RD2COS / RD2SIN: The Hall array configuration for cosine and sine channel can be read out by these commands, initial values are 0. SET TEST CFG 1: gen_rst HI triggers a digital reset. WRITE CONFIG: go2sleep HI activates the sleep mode of the AS5130. The power consumption is significantly reduced. go2sleep LO returns to normal operation mode. During sleep mode, the lock bit in command 0 and command 1 is LO. WRITE CUST: With “wlsb_x” the threshold level for generation of a WAKE pulse is set (only important in polling mode). The initial value is 4 LSB. No value lower than 4 LSB can be set. The maximum value is 127 LSB. “gain_x” sets the gain in the signal HYST_RST: “setHyst” enables an additional hysteresis of the digital output signal. It is enabled by default. Only after 2 consecutive equal signals the output is changed. “rst_otp” forces the IC to read out the OTP in polling mode. This reset has to be performed after initial startup and every WAKE signal. “rst_multi” resets the multi turn counter to 0. READ CUST: With this command “wlsb_x” and “gain_x” can be read out. RD_BOTH: Angle and multi turn counter value can be read out simultaneously by this command. Due to limited data size, the parity bit is not available in this command. STORE REF: This command stores the actual angle as reference angle in the storage registers (only important in polling mode). The output is the stored angle (angle_stored), a flag, if the voltage at DVDD is OK (store_ok), a flag, if the supply voltage is OK (vdd_ok) and a check bit, if the register was written. RD_MULTI: Command for read out of multi turn register (multiturn) and AGC value (agc). “Lock” indicates a locked ADC and “parity” an even parity checksum. RD_ANGLE: Command for read out of angle value and AGC value (agc). “Lock” indicates a locked ADC and “parity” an even parity checksum. Commands of the SSI in Extended Mode For programming or readout of the OTP data, the chip has to be started with DVDD at a low voltage (polling mode off or cap discharged) or the OTP reset has to be performed. If not, the OTP is not read out and the OTP data is not available. Table 9. SSI in Extended Mode # cmd bin mode <45:44> <43:32> <31:28> <27:26> <25> <24:23> <22:20> <19:16> <15:12> <11:9> <8> <7:0> 31 WRITE_ OTP 11111 xt write OTP Test ID OTP lock VREF Hall Bias Osc Redund ancy Sensiti vity Wake enable Zero Angle 30 11110 xt write 29 11101 xt write 28 11100 xt write 27 11011 xt write 26 11010 xt write 25 PROG_ OTP 11001 xt write OTP Test ID OTP lock VREF Hall Bias Osc Redund ancy Sensiti vity Wake enable Zero Angle 24 11000 xt write 15 01111 xt read OTP Test ID OTP lock VREF Hall Bias Osc Redund ancy Sensiti vity Wake enable Zero Angle |
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