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Revision 1.09

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AS5130

Data Sheet - D e ta i l e d D e s c r i p t i o n

Figure 11. External Circuitry for OTP Programming

Programming Verification

After programming, the programmed OTP bits are verified in following two ways:

By Digital Verification: This is simply done by sending a READ OTP command (#0FH, Refer to Table 9). The

structure of this register is the same as for the OTP PROG or OTP WRITE commands.

By Analog Verification: By sending an ANALOG OTP READ command (#09H), pin PROG becomes an output,

sending an analog voltage with each clock, representing a sequence of the bits in the OTP register. A voltage of

<500mV indicates a correctly programmed bit (“1”) while a voltage level between 2.2V and 3.5V indicates a correctly

unprogrammed bit (“0”). Any voltage level in between indicates improper programming.

Figure 12. Analog OTP Verification

Redundancy Decoding

Symbol

Parameter

Min

Max

Unit

Notes

Supply Voltage

5

5.5

V

GND

Ground Level

0

0

V

V_zapp

Programming Voltage

8

8.5

V

At pin PROG

T_zapp

Temperature

0

85

ºC

f_clk

CLK Frequency

100

kHz

At pin DCLK

PROG

GND

C1

C2

100nF 10µF

PROM Cell

maximum

parasitic cable

inductance

L<50nH

micro

controller

AS5130

100n

+5V

CS

CLK

DIO

PROG

AS5130

C1

I/O

Output

Output

12

10

2

11

C2

V

14 15

3

13