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Revision 1.09

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AS5130

Data Sheet - D e ta i l e d D e s c r i p t i o n

The procedure is as follows:

1. Initial startup: The circuit starts up with invalid trim values, which are read back from the storage registers; the

command rst_otp (command 19 – 10011) must be sent to read out valid trim values from the OTP.

2. These values are copied to the storage registers if OTP<8> (Wake enable) is set (must be set for polling

mode).

3. The values of AGC counter, actual angle, multi turn counter, hysteresis setting, wake threshold and gain set-

ting are continuously updated in the storage registers.

4. The actual angle is stored as a reference by sending command STORE REF (command 3 – 00011). without

this reference angle, a WAKE is generated at every startup.

angle is compared with the stored reference angle; if the difference between both exceeds the threshold, a

WAKE pulse is generated.

wake up signal will go to tri-state condition. In case of an angle comparison with a result below the threshold, the signal

maximum accuracy. A WAKE signal cannot be expected until the end of this period.

WAKE Interface

An open drain NMOS structure is used in the WAKE pad. In order to generate a clear output signal level, a pull up

resistor is required. The pad can drive 4mA.

VDD on (fast)

store_ok

POR (40us... 150us)

LO

LO

HI

HI

reset & reset_storage

reset digital core only

Retrieve values from storage registers

WAKE (26 clk periods)

Wait (162 clks - 86us ... 95us)

Compare mode

WAKE_ON

Normal mode

store_ok ?

Copy to Storage

Normal mode

OTP readout (46bit - 140us ... 400us)

true

true

false

false

WAKE (20 clk periods)

command rst_otp

OTP readout (OTP <8> = HI

|

measured –

stored| >

threshold

αα

α