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AS5130

Data Sheet - D e ta i l e d D e s c r i p t i o n

Figure 14. Low Power Mode and Ultra Low Power Mode Connection

If the AS5130 is cycled between active and reduced current mode, a substantial reduction of the average supply

current can be achieved. The minimum dwelling time in active mode is the wake-up time. The actual active time

depends on how much the magnet has moved while the AS5130 was in reduced power mode. The angle data is valid,

when the status bit LOCK has been set (see Table 8). Once a valid angle has been measured, the AS5130 can be put

back to reduced power mode. The average power consumption can be calculated as:

(EQ 7)

Where:

Reducing Power Supply Peak Currents

An optional RC-filter (Rx/Cx) may be added to avoid peak currents in the power supply line when the AS5130 is

5.5V under all conditions, especially during long active periods when the charge on Cx has expired. Cx should be

chosen such that it can support peak currents during the active operation period. For long active periods, Cx should be

large and Rx should be small.

Power Cycling Mode

The power cycling method shown in Figure 15 cycles the AS5130 by switching it on and off, using an external PNP

transistor high side switch. The current consumption in off-mode is zero. It also has the longest start-up time of all

modes, as the chip must always perform a “cold start“ from zero, which takes about 1.9 ms (Compare with Low Power

Mode on page 22).

Mode

Current Consumption (typ)

Wake-up Time to Active Operation

Active Operation

14mA

1.0 ms (without AGC)

3.8 ms(with locked AGC)

Low Power Mode

1,4mA

0.15 ms

micro

controller

AS5130

100n

+5V

CS

DCLK

DIO

AS5130

C1

S

N

on/off

R1

C1

+

+

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