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68HC05CL48 数据表(PDF) 37 Page - Motorola, Inc |
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68HC05CL48 数据表(HTML) 37 Page - Motorola, Inc |
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37 / 145 page  June 11, 1997 GENERAL RELEASE SPECIFICATION MC68HC05CL48 INTERRUPTS MOTOROLA REV 2.0 4-5 Figure 4-2. External Interrupts IRQ pin INTO bit I bit (CCR) External Power-On Reset External Reset External Interrupt DQ CK R Being Serviced Interrupt Request (read of vectors) (a) Interrupt Functional Block Diagram IRQ IRQ1 IRQn IRQ (MCU) tILIH tILIL tILIH Edge-sensitive Trigger Condition The minimum pulse width tILIH is one The period tILIL should not be less than the number of cycles it takes to execute the interrupt service routine plus 21 cycles Level-sensitive Trigger Condition If after servicing an interrupt, the IRQ Normally used with pull-up resistor for remains low, then the next interrupt is recognized. Wire-Ore connected (b) Interrupt Mode Diagram internal bus period. |
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