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M48T201Y 数据表(PDF) 16 Page - STMicroelectronics |
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M48T201Y 数据表(HTML) 16 Page - STMicroelectronics |
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16 / 37 page ![]() Operation M48T201Y, M48T201V 16/37 Note: Most low power SRAMs on the market today can be used with the M48T201Y/V TIMEKEEPER® SUPERVISOR. There are, however some criteria which should be used in making the final choice of an SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM. This allows inputs to the M48T201Y/V and SRAMs to be “Don't care” once VCC falls below VPFD (min). The SRAM should also guarantee data retention down to VCC = 2.0 V. The chip enable access time must be sufficient to meet the system needs with the chip enable (and output enable) output propagation delays included. |
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