HT68FU50 datasheet(149/244 Pages) HOLTEK

149 / 244 page

HT68F20/HT68F30/HT68F40/HT68F50/HT68F60

HT68FU30/HT68FU40/HT68FU50/HT68FU60

Rev. 1.50

149

March 15, 2011

the master that a slave device has accepted its calling

address. If no acknowledge signal is received by the

master then a STOP signal must be transmitted by the

master to end the communication. When the HAAS flag

is high, the addresses have matched and the slave de-

vice must check the SRW flag to determine if it is to be a

transmitter or a receiver. If the SRW flag is high, the

slave device should be setup to be a transmitter so the

HTX bit in the SIMC1 register should be set to

²1².Ifthe

SRW flag is low, then the microcontroller slave device

should be setup as a receiver and the HTX bit in the

SIMC1 register should be set to

²0².

2C Bus Data and Acknowledge Signal

The transmitted data is 8-bits wide and is transmitted af-

ter the slave device has acknowledged receipt of its

slave address. The order of serial bit transmission is the

MSB first and the LSB last. After receipt of 8-bits of data,

the receiver must transmit an acknowledge signal, level

²0², before it can receive the next data byte. If the slave

transmitter does not receive an acknowledge bit signal

from the master receiver, then the slave transmitter will

release the SDA line to allow the master to send a STOP

signal to release the I

2C Bus. The corresponding data

will be stored in the SIMD register. If setup as a transmit-

ter, the slave device must first write the data to be trans-

mitted into the SIMD register. If setup as a receiver, the

slave device must read the transmitted data from the

SIMD register.

When the slave receiver receives the data byte, it must

generate an acknowledge bit, known as TXAK, on the

9th clock. The slave device, which is setup as a trans-

mitter will check the RXAK bit in the SIMC1 register to

determine if it is to send another data byte, if not then it

will release the SDA line and await the receipt of a STOP

signal from the master.

D a t a

S = S t a r t ( 1 b i t )

S A = S l a v e A d d r e s s ( 7 b i t s )

S R = S R W b i t ( 1 b i t )

M = S l a v e d e v i c e s e n d a c k n o w l e d g e b i t ( 1 b i t )

D = D a t a ( 8 b i t s )

A = A C K ( R X A K b i t f o r t r a n s m i t t e r , T X A K b i t f o r r e c e i v e r 1 b i t )

P = S t o p ( 1 b i t )

S C L

S t a r t

S D A

S R W

A C K

S t o p

S C L

S D A

S l a v e A d d r e s s

S A

S R

S A

S R

Note:

* When a slave address is matched, the device must be placed in either the transmit mode and then write data

to the SIMD register, or in the receive mode where it must implement a dummy read from the SIMD register to

release the SCL line.

2C Communication Timing Diagram

HT68FU50 数据表(PDF) 149 Page - Holtek Semiconductor Inc

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