HT68FU50 datasheet(146/244 Pages) HOLTEK

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HT68F20/HT68F30/HT68F40/HT68F50/HT68F60

HT68FU30/HT68FU40/HT68FU50/HT68FU60

Rev. 1.50

146

March 15, 2011

· SIMC1 Register

Bit

76543210

Name

HCF

HAAS

HBB

HTX

TXAK

SRW

IAMWU

RXAK

R/W

POR

10000001

Bit 7

HCF:I

2C Bus data transfer completion flag

0: Data is being transferred

1: Completion of an 8-bit data transfer

The HCF flag is the data transfer flag. This flag will be zero when data is being transferred.

Upon completion of an 8-bit data transfer the flag will go high and an interrupt will be generated.

Bit 6

HAAS:I

2C Bus address match flag

0: Not address match

1: Address match

The HASS flag is the address match flag. This flag is used to determine if the slave device

address is the same as the master transmit address. If the addresses match then this bit will be

high, if there is no match then the flag will be low.

Bit 5

HBB:I

2C Bus busy flag

0: I

2C Bus is not busy

1: I

2C Bus is busy

The HBB flag is the I

2C busy flag. This flag will be

²1² when the I2C bus is busy which will

occur when a START signal is detected. The flag will be set to

²0² when the bus is free which will

occur when a STOP signal is detected.

Bit 4

HTX: Select I

2C slave device is transmitter or receiver

0: Slave device is the receiver

1: Slave device is the transmitter

Bit 3

TXAK:I

2C Bus transmit acknowledge flag

0: Slave send acknowledge flag

1: Slave do not send acknowledge flag

The TXAK bit is the transmit acknowledge flag. After the slave device receipt of 8-bits of data,

this bit will be transmitted to the bus on the 9th clock from the slave device. The slave device

must always set TXAK bit to

²0² before further data is received.

Bit 2

SRW:I

2C Slave Read/Write flag

0: Slave device should be in receive mode

1: Slave device should be in transmit mode

The SRW flag is the I

2C Slave Read/Write flag. This flag determines whether the master

device wishes to transmit or receive data from the I

2C bus. When the transmitted address and

slave address is match, that is when the HAAS flag is set high, the slave device will check the

SRW flag to determine whether it should be in transmit mode or receive mode. If the SRW flag is

high, the master is requesting to read data from the bus, so the slave device should be in transmit

mode. When the SRW flag is zero, the master will write data to the bus, therefore the slave

device should be in receive mode to read this data.

Bit 1

IAMWU:I

2C Address Match Wake-up Control

0: Disable

1: Enable - must be cleared by the application program after wake-up

This bit should be set to

²1² to enable the I2C address match wake up from the SLEEP or IDLE

Mode. If the IAMWU bit has been set before entering either the SLEEP or IDLE mode to enable

the I

2C address match wake up, then this bit must be cleared by the application program after

wake-up to ensure correction device operation.

Bit 0

RXAK:I

2C Bus Receive acknowledge flag

0: Slave receive acknowledge flag

1: Slave do not receive acknowledge flag

The RXAK flag is the receiver acknowledge flag. When the RXAK flag is

²0², it means that a

acknowledge signal has been received at the 9th clock, after 8 bits of data have been

transmitted. When the slave device in the transmit mode, the slave device checks the RXAK flag

to determine if the master receiver wishes to receive the next byte. The slave transmitter will

therefore continue sending out data until the RXAK flag is

²1². When this occurs, the slave

transmitter will release the SDA line to allow the master to send a STOP signal to release the I

Bus.

HT68FU50 数据表(PDF) 146 Page - Holtek Semiconductor Inc

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