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HT68FU50 数据表(PDF) 183 Page - Holtek Semiconductor Inc |
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HT68FU50 数据表(HTML) 183 Page - Holtek Semiconductor Inc |
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183 / 244 page ![]() Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions RPH Pull-high Resistance for SCS only 3.0V ¾ 20 60 100 k W 5.0V 10 30 50 k W Note: ²*² The operating current IDD1 listed here is the additional current consumed when the slave SPI interface in the UART module is enabled and the UART interface is disabled. Similarly, the operating current IDD2 here is the additional current consumed when both the slave SPI interface and UART interface are enabled. If the UART module is enabled, either IDD1 or IDD2 should be added to calculate the relevant operating current of the device for different conditions. To calculate the standby current for the whole device, the standby current shown above should be taken into account. UART Module A.C. Characteristics Ta=25 °C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions tCP SCK Period (tCH +tCL) 3.0V ¾ 62.5 ¾¾ ns 5.0V ¾ 50.0 ¾¾ ns tCH SCK High Time 3.0V ¾ 28 ¾¾ ns 5.0V ¾ 22 ¾¾ ns tCL SCK Low Time 3.0V ¾ 28 ¾¾ ns 5.0V ¾ 22 ¾¾ ns tCSW SCS High Pulse Width 3.0V ¾ 500 ¾¾ ns 5.0V ¾ 400 ¾¾ ns tCSS SCS to SCK Setup Time ¾¾ 100 ¾¾ ns tCSH SCS to SCK Hold Time ¾¾ 0 ¾¾ ns tSDS SDI to SCK Setup Time ¾¾ 100 ¾¾ ns tSDH SDI to SCK Hold Time ¾¾ 0 ¾¾ ns tR SPI Output Rise Time ¾¾ ¾ 10 ¾ ns tF SPI Output Fall Time ¾¾ ¾ 10 ¾ ns tW SPI Data Output Delay Time ¾¾ 0 ¾¾ ns HT68F20/HT68F30/HT68F40/HT68F50/HT68F60 HT68FU30/HT68FU40/HT68FU50/HT68FU60 Rev. 1.50 183 March 15, 2011 |
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