IMX28CEC datasheet(49/70 Pages) FREESCALE

49 / 70 page

i.MX28 Applications Processors Data Sheet for Consumer Products, Rev. 1

Freescale Semiconductor

3.5.11

Pulse Width Modulator (PWM) Timing

Figure 30 depicts the timing of the PWM, and Table 52 lists the PWM timing characteristics.

The PWM can be programmed to select one of two clock signals as its source frequency: xtal clock or

hsadc clock. The selected clock signal is passed through a prescaler before being input to the counter. The

output is available at the pulse width modulator output (PWMO) external pin.

PWM also supports MATT mode. In this mode, it can be programmed to select one of two clock signals

as its source frequency, 24-MHz or 32-KHz crystal clock. For a 32-KHz source clock input, the PWM

outputs the 32-KHz clock directly to PAD.

Figure 30. PWM Timing

SJ10

TCK low to TDO data valid

—

SJ11

TCK low to TDO high impedance

—

SJ12

TRST assert time

100

—

SJ13

TRST set-up time to TCK low

—

1 V

M – mid point voltage

Table 52. PWM Output Timing Parameter: Xtal clock

Ref No.

Parameter

Minimum

Maximum

Unit

System CLK frequency1

1 CL of PWMO = 30 pF

24MHz

MHz

Clock high time

—

Clock low time

—

Clock fall time

—

0.3

Clock rise time

—

0.3

Output delay time

—

15.08

Output setup time

15.77

—

Table 51. SJC Timing Parameters (continued)

Parameter

All Frequencies

Unit

Min.

Max.

PWM Source Clock

PWM Output

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