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AS3421 数据表(PDF) 21 Page - ams AG |
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AS3421 数据表(HTML) 21 Page - ams AG |
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21 / 61 page ![]() www.austriamicrosystems.com Revision 0.90 21 - 61 AS3421 AS3422 Datasheet - D e t a i l e d D e s c r i p t i o n 9.6 VNEG Charge Pump The VNEG charge pump uses one external 1uF capacitor to generate a negative supply voltage out of the battery input voltage to supply all audio related blocks. This allows a true-ground headphone output with no more need of external dc-decoupling capacitors. 9.6.1 Parameter VBAT=1.5V, TA= 25ºC, unless otherwise specified. 9.7 OTP Memory & Internal Registers The OTP memory consists of OTP register and the OTP fuses.The OTP register can be written as often as wanted but will lose the content on power off. The OTP fuses are intended to store basic chip configurations as well as the microphone gain settings to optimize the ANC performance and get rid of sensitivity variations of different microphones. Burning the fuses can only be done once and is a permanent change, which means the fuses keep the content even if the chip is powered down. This AS3421/22 offers 4 register set for storing the microphone gain making it possible to change the gain 3 times for re-calibration or other purposes. When the chip is controlled by a microcontroller via I2C, the OTP memory don’t has to be used. The chip configuration can be stored in the flash memory of the Bluetooth- or wireless chipset. 9.7.1 Register & OTP Memory Configuration Figure 25 is showing the principal register interaction. Figure 25. Register Access Registers 0x8, 0x9, 0xA, 0xB, 0xC and 0x21 have only effect when the corresponding “REG_ON” bit is set, otherwise the chip operates with the OTP Register settings which are loaded from the OTP fuses at every start-up. All registers settings can be changed several times, but will loose the content on power off. When using the I2C mode, the chip configuration has to be loaded from the micro controller after every start-up. In stand alone mode the OTP fuses have to be programmed for a permanent change of the chip configuration. A single OTP cell can be programmed only once. Per default, the cell is “0”; a programmed cell will contain a “1”. While it is not possible to reset a programmed bit from “1” to “0”, multiple OTP writes are possible, but only additional unprogrammed “0”-bits can be programmed to “1”. Independent of the OTP programming, it is possible to overwrite the OTP register temporarily with an OTP write command at any time. This setting will be cleared and overwritten with the hard programmed OTP settings at each power-up sequence or by a LOAD operation. Table 12. Headphone Output Parameter Symbol Parameter Condition Min Typ Max Unit VIN Input voltage VBAT 1.0 1.5 1.8 V VOUT Output voltage VNEG -0.7 -1.5 -1.8 V CEXT External flying capacitor 1 F OTP Register 10h...16h; 30h...35h OTP Fuses BURN LOAD Register 0x8,0x9,0xA 0xB, 0xC, 0x21 OTP WRITE OTP READ normal I2C write normal I2C read Register 8h...21h OTP path is default but can be switched by register setting |
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