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AS3421 数据表(PDF) 29 Page - ams AG |
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AS3421 数据表(HTML) 29 Page - ams AG |
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29 / 61 page ![]() OTP Register 10h ANC_L2 TEST_BIT_5 MICL_VOL_OTP2<6:0> Gain from MICL to QMICL or Mixer = MUTE, -11.25dB...+36dB; 127 steps of 0.375dB 11h ANC_R2 ALT1_LOCK MICR_VOL_OTP2<6:0> Gain from MICR to QMICR or Mixer = MUTE, -11.25dB...+36dB; 127 steps of 0.375dB 12h ANC_L3 TEST_BIT_6 MICL_VOL_OTP3<6:0> Gain from MICL to QMICL or Mixer = MUTE, -11.25dB...+36dB; 127 steps of 0.375dB 13h ANC_R3 ALT2_LOCK MICR_VOL_OTP3<6:0> Gain from MICR to QMICR or Mixer = MUTE, -11.25dB...+36dB; 127 steps of 0.375dB 14h ANC_L4 TEST_BIT_7 MICL_VOL_OTP4<6:0> Gain from MICL to QMICL or Mixer = MUTE, -11.25dB...+36dB; 127 steps of 0.375dB 15h ANC_R4 ALT3_LOCK MICR_VOL_OTP4<6:0> Gain from MICR to QMICR or Mixer = MUTE, -11.25dB...+36dB; 127 steps of 0.375dB 16h MICS_CNTR LowBat + 100mV DEL_ ANC_MUX 17h PWRUP SEQ_LOCK FAST_START<4:0> 0: ~900ms; 0Eh: ~600ms LIN_AGC_OFF MIC_AGC_OFF 30h ANC_L TEST_BIT_1 MICL_VOL_OTP<6:0> Gain from MICL to QMICL or Mixer = MUTE, -11.25dB...+36dB; 127 steps of 0.375dB 31h ANC_R TEST_BIT_2 MICR_VOL_OTP<6:0> Gain from MICR to QMICR or Mixer =MUTE, -11.25dB...+36dB; 127 steps of 0.375dB 32h MIC_MON MON_MODE 0: fixed volume 1: adj. volume MIC_MON_OTP<6:0> Gain from MICl/R to QMICL/R or Mixer = MUTE, -5.625dB...+41.6dB; 0.375dB steps, if MON_MODE is set to 0 Gain from MICl/R to QMICL/R or Mixer = MUTE, -5.625dB...+41.6dB; 0.375dB steps, adjustable by VOL pin if MON_MODE is set to 1 33h AUDIO_SET NO_PB_MODE_OTP 0: PB mode enabled 1: PB mode disabled VOL_BUTTON_ MODE_OTP 0: Volume Mode disabled 1: Volume Mode enabled LINE_GAIN_+3dB OTP 0: 0dB max. Line Gain 1: +3dB max. Line Gain MIC_MODE_ OTP 0: StereoSingleEnd 1: MonoDiff HP_MODE_ OTP 0: StereoSingleEnd 1: MonoDiff LIN_MON_ATTEN<2:0> 0: no attenuation; 1..6: LIN_VOL<6:0> shift by -6dB...-36dB 7: MUTE 34h GP_OP HP_MUX_OTP<1:0> 0: MIC; 1: OP1; 2: OP2; 3: - OP2_OTP<3:0> 0: OP2 inverting mode; 0x1..0xF: OP2 non inverting mode gain = 0...10.5dB; 15 steps of 0.75dB OP2_ON_OTP OP1_ON_OTP 35h OTP_SYS MAIN_LOCK 0: write reg 30h.. 35h 1: lock reg 30h..35h TEST_BIT_3 MON_HP_MUX<1:0> 0: MIC; 1: OP1; 2: OP2; 3: - CP_MODE 0: Low noise, low voltage 1: High output voltage; MICS_CP_OFF I2C_MODE 3Eh CONFIG_1 EXTBURNCLK 3Fh CONFIG_2 TM34 BURNSW TM_REG34-35 TM_REG30-33 OTP_MODE<1:0> 0: READ; 1: LOAD; 2: WRITE; 3: BURN Table 15. I2C Register Overview Addr Name b7 b6 b5 b4 b3 b2 b1 b0 |
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